Texas Instruments TMS320DM355 User Manual
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PRODUCT PREVIEW
5.7 External Memory Interface (EMIF)
5.7.1
Asynchronous EMIF (AEMIF)
TMS320DM355
Digital Media System-on-Chip (DMSoC)
Digital Media System-on-Chip (DMSoC)
SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007
supports several memory and external device interfaces, including:
•
Asynchronous EMIF (AEMIF) for interfacing to SRAM.
•
OneNAND flash memories
•
NAND flash memories
The EMIF supports the following features:
•
SRAM, etc. on up to 2 asynchronous chip selects addressable up to 64KB each
•
Supports 8-bit or 16-bit data bus widths
•
Programmable asynchronous cycle timings
•
Supports extended wait mode
•
Supports Select Strobe mode
5.7.1.1 NAND (NAND, SmartMedia, xD)
The NAND features of the EMIF are as follows:
•
NAND flash on up to 2 asynchronous chip selects
•
8 and 16-bit data bus widths
•
Programmable cycle timings
•
Performs 1-bit and 4-bit ECC calculation
•
NAND Mode also supports SmartMedia/SSFDC (Solid State Floppy Disk Controller) and xD memory
cards
cards
5.7.1.2 OneNAND
The OneNAND features supported are as follows.
•
NAND flash on up to 2 asynchronous chip selects
•
Only 16-bit data bus widths
•
Supports asynchronous writes and reads
•
Supports synchronous reads with continuous linear burst mode (Does not support synchronous reads
with wrap burst modes)
with wrap burst modes)
•
Programmable cycle timings for each chip select in asynchronous mode
Peripheral Information and Electrical Specifications
106