Intel Core 2 Duo T5300 187098 User Manual
Product codes
187098
Datasheet
23
Electrical Specifications
3
Electrical Specifications
3.1
Power and Ground Pins
For clean, on-chip power distribution, the processor will have a large number of V
CC
(power) and V
SS
(ground) inputs. All power pins must be connected to V
CC
power
planes while all V
SS
pins must be connected to system ground planes. Use of multiple
power and ground planes is recommended to reduce I*R drop. Refer to the platform
design guide for more details. The processor V
CC
pins must be supplied the voltage
determined by the VID (Voltage ID) pins.
3.2
FSB Clock (BCLK[1:0]) and Processor Clocking
BCLK[1:0] directly controls the FSB interface speed as well as the core frequency of the
processor. As in previous-generation processors, the processor core frequency is a
multiple of the BCLK[1:0] frequency. The processor uses a differential clocking
implementation.
3.3
Voltage Identification
The processor uses seven voltage identification pins,VID[6:0], to support automatic
selection of power supply voltages. The VID pins for processor are CMOS outputs
specifies the voltage level corresponding
to the state of VID[6:0]. A 1 refers to a high-voltage level and a 0 refers to low-voltage
level.
Table 2.
Voltage Identification Definition (Sheet 1 of 4)
VID6
VID5
VID4
VID3
VID2
VID1
VID0
V
CC
(V)
0
0
0
0
0
0
0
1.5000
0
0
0
0
0
0
1
1.4875
0
0
0
0
0
1
0
1.4750
0
0
0
0
0
1
1
1.4625
0
0
0
0
1
0
0
1.4500
0
0
0
0
1
0
1
1.4375
0
0
0
0
1
1
0
1.4250
0
0
0
0
1
1
1
1.4125
0
0
0
1
0
0
0
1.4000
0
0
0
1
0
0
1
1.3875
0
0
0
1
0
1
0
1.3750
0
0
0
1
0
1
1
1.3625
0
0
0
1
1
0
0
1.3500
0
0
0
1
1
0
1
1.3375
0
0
0
1
1
1
0
1.3250
0
0
0
1
1
1
1
1.3125
0
0
1
0
0
0
0
1.3000
0
0
1
0
0
0
1
1.2875