Intel Core 2 Duo T5300 187098 User Manual

76

Datasheet

Besides the thermal sensor and thermal control circuit, the Intel Thermal Monitor also 

includes one ACPI register, one performance counter register, three MSR, and one I/O 

pin (PROCHOT#). All are available to monitor and control the state of the Intel Thermal 

Monitor feature. The Intel Thermal Monitor can be configured to generate an interrupt 

upon the assertion or deassertion of PROCHOT#. 

PROCHOT# will not be asserted when the processor is in the Stop Grant, Sleep, Deep 

Sleep, and Deeper Sleep low-power states, hence the thermal diode reading must be 

used as a safeguard to maintain the processor junction temperature within maximum 

specification. If the platform thermal solution is not able to maintain the processor 

junction temperature within the maximum specification, the system must initiate an 

orderly shutdown to prevent damage. If the processor enters one of the above low-

power states with PROCHOT# already asserted, PROCHOT# will remain asserted until 

the processor exits the low-power state and the processor junction temperature drops 

below the thermal trip point. 

If thermal monitor automatic mode is disabled, the processor will be operating out of 

specification. Regardless of enabling the automatic or on-demand modes, in the event 

of a catastrophic cooling failure, the processor will automatically shut down when the 

silicon has reached a temperature of approximately 125°C. At this point the 

THERMTRIP# signal will go active. THERMTRIP# activation is independent of processor 

activity and does not generate any bus cycles. When THERMTRIP# is asserted, the 

processor core voltage must be shut down within the time specified in 

.

In all cases, the Intel Thermal Monitor feature must be enabled for the processor to 

remain within specification.

The processor also contains an on-die digital thermal sensor (DTS) that can be read via 

an MSR (no I/O interface). Each core of the processor will have a unique digital thermal 

sensor whose temperature is accessible via the processor MSRs. The DTS is the 

preferred method of reading the processor die temperature since it can be located 

much closer to the hottest portions of the die and can thus more accurately track the 

die temperature and potential activation of processor core clock modulation via the 

thermal monitor. The DTS is only valid while the processor is in the normal operating 

state (the normal package level low-power state).

Unlike traditional thermal devices, the DTS outputs a temperature relative to the 

maximum supported operating temperature of the processor (T

J,max

). It is the 

responsibility of software to convert the relative temperature to an absolute 

temperature. The temperature returned by the DTS will always be at or below T

J,max

. 

Catastrophic temperature conditions are detectable via an out of specification status 

bit. This bit is also part of the DTS MSR. When this bit is set, the processor is operating 

out of specification and immediate shutdown of the system should occur. The processor 

operation and code execution is not ensured once the activation of the out of 

specification status bit is set.

The DTS-relative temperature readout corresponds to the thermal monitor (TM1/TM2) 

trigger point. When the DTS indicates maximum processor core temperature has been 

reached, the TM1 or TM2 hardware thermal control mechanism will activate. The DTS 

and TM1/TM2 temperature may not correspond to the thermal diode reading since the 

thermal diode is located in a separate portion of the die and thermal gradient between 

the individual core DTS. Additionally, the thermal gradient from DTS to thermal diode 

can vary substantially due to changes in processor power, mechanical and thermal 

attach, and software application. The system designer is required to use the DTS to 

ensure proper operation of the processor within its temperature operating 

specifications.