Intel PCI User Manual
Software Developer’s Manual
107
EEPROM Interface
5.6.10
Device ID (Word 0Dh, 11h
1
)
If the signature bits (15:14) and bit 1 (Load Subsystem IDs) of word 0Ah are valid, this word is
read in to initialize the Subsystem ID.
For the 82546GB, the Device ID must be forced to 107Bh for SerDes-SerDes interface operation.
For the 82545GM, the Device ID should be 1028h. This ensures proper functionality with Intel
drivers and boot agent.
drivers and boot agent.
Note: Since the 82546GB/EB is a dual-port device, the Device ID in 0Dh corresponds to LAN A and the
Device ID in 11h corresponds to LAN B.
5.6.11
Vendor ID (Word 0Eh)
If the signature bits (15:14) and bit 1 (Load Subsystem IDs) of word 0Ah are valid, this word is
read in to initialize the Subsystem ID.
5.6.12
Initialization Control Word 2 (Word 0Fh)
This is the second word read by the Ethernet controller and contains additional initialization values
that:
•
Sets defaults for some internal registers
•
Enables/disables specific features
1.
Word 11h only applicable to the 82546GB/EB.
Table 5-6. Initialization Control Word 2 (Word 0Fh)
Bit
Name
Description
15
APM PME# Enable
Initial value of the Assert PME On APM Wakeup bit in the Wakeup Control
Register (WUC.APMPME).
When set to 0b (default), deasserts PME# on wakeup.
Set this bit to 1b for Intel LAN controller cards.
Register (WUC.APMPME).
When set to 0b (default), deasserts PME# on wakeup.
Set this bit to 1b for Intel LAN controller cards.
14
ASDE
When set to 0b (default), indicates the initial value of the Auto-Speed
Detection Enable (ASDE) bit of the Device Control Register (CTRL).
When set to 1b, enables 10/100/1000 Mb/s systems.
Detection Enable (ASDE) bit of the Device Control Register (CTRL).
When set to 1b, enables 10/100/1000 Mb/s systems.
13:12
PAUSE Capability
Pause Capability - Mapped to TXCW[8:7].
When set to 1b (default), enables desired PAUSE capability for an
advertised configuration base page.
When set to 0b, disables desired PAUSE capability for an advertised
configuration base page.
When set to 1b (default), enables desired PAUSE capability for an
advertised configuration base page.
When set to 0b, disables desired PAUSE capability for an advertised
configuration base page.
11
ANE
Reserved bit for the
82541xx and
82547GI/EI (set to
0b).
Reserved bit for the
82541xx and
82547GI/EI (set to
0b).
Auto-Negotiation Enable. Mapped to TXCW[31].
Set this bit to 1b to automatically enable Auto-Negotiation.
Set this bit to 0b (default) to automatically disable Auto-Negotiation.
Note: Fiber implementations do not support this function.
Set this bit to 1b to automatically enable Auto-Negotiation.
Set this bit to 0b (default) to automatically disable Auto-Negotiation.
Note: Fiber implementations do not support this function.
10:9
FLASH Size Indication
Indicates FLASH size. 00b = 64 KB (default); 01b = 128 KB; 10b = 256 KB;
11b = 512 KB.
These bits also impact the requested memory space for the FLASH and
Expansion ROM BARs in PCI configuration space.
11b = 512 KB.
These bits also impact the requested memory space for the FLASH and
Expansion ROM BARs in PCI configuration space.