Intel PCI User Manual

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The Checksum word (3Fh) should be calculated such that after adding all the words (00h-3Fh), 

including the Checksum word itself, the sum should be BABAh. The initial value in the 16-bit 

summing register should be 0000h and the carry bit should be ignored after each addition. This 
checksum is not accessed by the Ethernet controller. If CRC checking is required, it must be 

performed by software.

Note: Hardware does not calculate checksum word 3Fh during EEPROM write; it must be calculated by 

software independently and included in the EEPROM write data. Hardware does not compute a 
checksum over words 00h-0Fh during EEPROM reads in order to determine the validity of the 

EEPROM image; this field is provided strictly for software verification of EEPROM validity. All 

hardware configuration based on word 00h-0Fh content is based on the validity of the Signature 
field of EEPROM Initialization Control Word 1. Signature must be 01b.

Four bits and two words determine dual-channel fiber WOL mode and functionality. In addition to 
the power management bits, one of the SDP’s must be set in order for the “A” laser to remain on 

when the system goes into D3. Three states are defined for the EEPROM image:

•

Never - The Ethernet controller has WOL disabled and cannot be put into WOL mode.

•

Possible - The Ethernet controller can be WOL enabled, but currently has the feature turned 

off. This is the normal shipping configuration for WOL-capable server adapter cards.

•

On - The Ethernet controller is set with WOL functionality enabled.

Refer to the appropriate Ethernet controller’s EEPROM map and programming information for 

sample EEPROM images.

Never

0

0

4C03

Possible

1

0

4C0B

On

1

1

4C2B

Never

0

0

C109

Possible

1

0

C10D

On

1

1

C18D