Intel PCI User Manual

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Software Developer’s Manual
141
Power Management
If power management is not disabled and when the Data_Select field is programmed to 0 or 4, the 
Ethernet controller sets the Data Register to the D0 Power value in the EEPROM. When the 
Data_Select
 field is programmed to 3 or 7, the Ethernet controller sets the Data Register to the D3 
Power
 value in the EEPROM. Otherwise it returns 0b.
6.4
Wakeup
The Ethernet controller supports two types of wakeup mechanisms:
Advanced Power Management (APM) Wakeup
ACPI Power Management Wakeup
Note:
The 82541ER contains power management logic, but is not spec-compliant, because it does not 
assert PME# for Magic Packets, Network Wakeup Packets, or link change status.
The ACPI Power Management Wakeup uses the PME# pin to wake up the system. The Advanced 
Power Management Wakeup uses the PME# pin.
6.4.1
Advanced Power Management Wakeup
“Advanced Power Management Wakeup”, or “APM Wakeup”, was previously known as “Wake on 
LAN”. The basic premise is to receive a broadcast or unicast packet with an explicit data pattern, 
and then to assert a signal to wake up the system. In the earlier generations of the Ethernet 
controller, this was accomplished by using special signal. The Ethernet controller would assert the 
signal for approximately 50 ms to signal a wakeup. The 82544GC/EI uses the APM_WAKEUP 
pin for this function. For the remaining Ethernet controllers, the PCI PME# signal has been used to 
wake up the system. 
On power-up, the Ethernet controller reads the APM Enable bits from the EEPROM Initialization 
Control Word 2 into the APM Enable (APME) bits of the Wakeup Control Register (WUC). These 
bits control enabling of APM Wakeup. 
When APM Wakeup is enabled, the Ethernet controller checks all incoming packets for “Magic 
Packets”.   See 
 for a definition of “Magic Packets*”. 
Once the Ethernet controller receives a matching magic packet, it:
Sets the PME_Status bit in the Power Management Control / Status Register (PMCSR) and 
asserts PME#. If the Assert PME On APM Wakeup (APMPME) bit is set in the Wakeup 
Control Register (WUCR).
Stores the first 128 bytes of the packet in the Wakeup Packet Memory (WUPM).
Sets the Magic Packet Received bit in the Wakeup Status Register (WUS).
Sets the packet length in the Wakeup Packet Length Register (WUPL).
Asserts PME# until the driver clears the Magic Packet Received AMAG bit in the Wakeup 
Status Register (WUS), the driver clears the Assert PME On APM Wakeup (APMPME) bit in 
the Wakeup Control Register (WUC), or the driver disables APM Wakeup.
For the 82544GC/EI only, asserts APM_WAKEUP for 50 ms. For purposes of 
APM_WAKEUP assertion, the 82544GC/EI ignores any additional magic packets received 
during that 50 ms. If the 82544GC/EI receives another magic packet afterwards, it reasserts 
APM_WAKEUP for another 50 ms.