Intel PCI User Manual
308
Software Developer’s Manual
Register Descriptions
For the 82541xx and 82547GI/EI, carrier extension (through the TCTL
COLD
field) provides a
method to increase the duration of the carrier event to a minimum usable duration in order to meet
a 200 m collision domain objective, even though half-duplex operation is impractical at Gigabit.
Packets that are signaled from the CSMA/CD layer that do not meet the minimum slot time of 512
bytes have extension bytes appended to them in order to meet this minimum slot time requirement.
bytes have extension bytes appended to them in order to meet this minimum slot time requirement.
The extension bytes are defined within the context of the frame encapsulation discussion of the
Figure 13-1. Carrier Extended Frame Format (82541xx and 82547GI/EI)
13.4.34
Transmit IPG Register
TIPG (00410;R/W)
This register controls the IPG (Inter Packet Gap) timer for the Ethernet controller.
Reserved
23
0b
Reserved
Read as 0b.
Should be written with 0b for future compatibility.
Read as 0b.
Should be written with 0b for future compatibility.
RTLC
24
0b
Re-transmit on Late Collision
When set, enables the Ethernet controller to re-transmit on a late
collision event.
The collision window is speed dependent. For example, 64 bytes
for 10/100 Mb/s and 512 bytes for 1000Mb/s operation. If a late
collision is detected when this bit is disabled, the transmit function
assumes the packet is successfully transmitted.
The RTLC bit is ignored in full-duplex mode.
When set, enables the Ethernet controller to re-transmit on a late
collision event.
The collision window is speed dependent. For example, 64 bytes
for 10/100 Mb/s and 512 bytes for 1000Mb/s operation. If a late
collision is detected when this bit is disabled, the transmit function
assumes the packet is successfully transmitted.
The RTLC bit is ignored in full-duplex mode.
NRTU
1
Reserved
25
0b
No Re-transmit on underrun (82544GC/EI only)
If this bit is set, the 82544GC/EI does not re-transmit packets that
initially had an underrun.
This function is accomplished by waiting for the entire packet to be
buffered in the transmit FIFO before the controller attempts to re-
transmit a packet that previously encountered an underrun. This
operation guarantees only one underrun can occur per packet.
This is a reserved bit for all other Ethernet controllers and should
be written with 0b for future compatibility.
If this bit is set, the 82544GC/EI does not re-transmit packets that
initially had an underrun.
This function is accomplished by waiting for the entire packet to be
buffered in the transmit FIFO before the controller attempts to re-
transmit a packet that previously encountered an underrun. This
operation guarantees only one underrun can occur per packet.
This is a reserved bit for all other Ethernet controllers and should
be written with 0b for future compatibility.
Reserved
31:26
0b
Reserved
Read as 0.
Should be written with 0b for future compatibility.
Read as 0.
Should be written with 0b for future compatibility.
1.
82544GC/EI only.
Field
Bit(s)
Initial
Value
Value
Description
Duration of Carrier Event
Slot Time
Minimum Frame Size
Preamble
SFD
DA
SA
T/L
FCS
Data/Pad
Extension