Intel PCI User Manual

Page of 406
330
Software Developer’s Manual
Register Descriptions
31
20
19
18
17
16
15
8
7
6
5
4
3
2
1
0
Reserved
FLX3
FLX2
FLX1
FLX0
Reserved
IPv6
1
IPv4
2
ARP
BC
MC
EX
MAG
LNKC
1.
Not applicable to the 82544GC/EI.
2.
IP for the 82544GC/EI.
Field
Bit(s)
Initial Value
Description
LNKC
0
0b
Link Status Change.
MAG
1
0b
Magic Packet Received.
EX
2
0b
Directed Exact Packet Received
The packet’s address matched one of the 16 pre-programmed 
exact values in the Receive Address registers.
MC
3
0b
Directed Multicast Packet Received
The packet was a multicast packet whose hashed to a value 
that corresponded to a 1 bit in the Multicast Table Array.
BC
4
0b
Broadcast Packet Received.
ARP
5
0b
ARP Request Packet Received.
IPv4
1
1.
IP for the 82544GC/EI.
6
0b
Directed IPv4 Packet Received.
IPv6
2
2.
Not applicable to the 82544GC/EI.
7
0b
Directed IPv6 Packet Received.
FLX0
16
0b
Flexible Filter 0 Match.
FLX1
17
0b
Flexible Filter 1 Match.
FLX2
18
0b
Flexible Filter 2 Match.
FLX3
19
0b
Flexible Filter 3 Match.