Intel PCI User Manual
350
Software Developer’s Manual
Register Descriptions
Table 13-119. GPRC Register Bit Description
13.7.28
Broadcast Packets Received Count
BPRC (04078h; R)
This register counts the number of good (no errors) broadcast packets received. This register does
not count broadcast packets received when the broadcast address filter is disabled. This register
not count broadcast packets received when the broadcast address filter is disabled. This register
only increments if receives are enabled.
Table 13-120. BPRC Register Bit Description
13.7.29
Multicast Packets Received Count
MPRC (0407Ch; R)
This register counts the number of good (no errors) multicast packets received. This register does
not count multicast packets received that fail to pass address filtering nor does it count received
flow control packets. This register only increments if receives are enabled. This register does not
count packets counted by the Missed Packet Count (MPC) register.
count packets counted by the Missed Packet Count (MPC) register.
31
0
GPRC
Field
Bit(s)
Initial
Value
Value
Description
GPRC
31:0
0b
Number of good packets received (of any length).
31
0
BPRC
Field
Bit(s)
Initial
Value
Value
Description
BPRC
31:0
0b
Number of broadcast packets received.