Intel PCI User Manual

49

Note: The VLE, IFCS, and VLAN fields are only valid in certain descriptors. If TSE is enabled, the VLE, 

IFCS, and VLAN fields are only valid in the first data descriptor of the TCP segmentation context. 
If TSE is not enabled, then these fields are only valid in the last descriptor of the given packet 

(qualified by the EOP bit).

Four bits are reserved to provide transmit status, although only the DD is valid

1

. The status word is 

only written back to host memory in cases where the RS bit is set in the command field. The DD bit 
indicates that the descriptor is finished and is written back after the descriptor has been processed.

TSE (bit 2)

TCP Segmentation Enable
TSE indicates that this descriptor is part of the current TCP Segmentation context. If 
this bit is not set, the descriptor is part of the “normal” context.

IFCS (Bit 1)

Insert IFCS
Controls the insertion of the FCS/CRC field in normal Ethernet packets.
IFCS is only valid in the last descriptor of the given packet (qualified by the EOP bit).

EOP (Bit 0)

End Of Packet
The EOP bit indicates that the buffer associated with this descriptor contains the last 
data for the packet or for the given TCP Segmentation context. In the case of a TCP 
Segmentation context, the DTALEN length of this descriptor should match the 
amount remaining of the original PAYLEN. If it does not, the TCP Segmentation 
context is terminated but the end of packet processing may be incorrectly performed. 
These abnormal termination events are counted in the TSCTFC statistics register.

1. Unless the RPS bit is set in the descriptor (82544GC/EI only).

RSV

TU

a

a. 82544GC/EI only.

LC

EC

DD

Reserved

Reserved