Renesas R5S72623 User Manual

 
Section 21   IEBus

TM

 Controller 

Page 1136 of 2108 

 

R01UH0134EJ0400  Rev. 4.00 

 

 Sep 

24, 

2014 

SH7262 Group, SH7264 Group

Figure 21.6 shows the relationship between the transfer format and each register during the IEBus 
data transmission. 

IETBFL

IEMCR

[In master transmission]

[In slave transmission]

Communications frame

Communications frame

Register

Register

Notes:

1. 

In slave transmission, the received master address is not saved. If the unit is locked,

 

address comparison performed. 

2. 

The received slave address is compared with IEAR1 and IEAR2, and if these addresses

 match, 

operation 

continues.

3. 

In slave transmission, the received control bits are not saved. The received control bits

 

are decoded to decide the subsequent operation.

IETB001 to IETB128

Message length bits

Data bits

Slave address

Master address

Control bits

Message length bits

Data bits

Slave address

Master address

Control bits

IESA1, IESA2

IEAR1, IEAR2

(*1)

(*3)

(*2)

IEAR1, IEAR2

IETBFL

IETB001 to IETB128