Renesas R5S72623 User Manual

Page of 2152
 
Section 33   Power-Down Modes 
R01UH0134EJ0400  Rev. 4.00  
 
Page 1777 of 2108 
Sep 24, 2014 
 
 
 
SH7262 Group, SH7264 Group 
Bit Bit 
Name 
Initial 
Value R/W Description 
MSTP32 
R/W 
Module Stop 32 
When the MSTP32 bit is set to 1, the clock supply to 
the AD converter is halted. 
0: The AD converter runs. 
1: Clock supply to the AD converter is halted. 

1 R 
Reserved 
This bit is always read as 1. The write value should 
always be 1. 
MSTP30 
R/W 
Module Stop 30 
When the MSTP30 bit is set to 1, the clock supply to 
the realtime clock is halted. 
0: The realtime clock runs. 
1: Clock supply to the realtime clock is halted. 
Note:  When the realtime clock is halted, set the bits 
in registers shown below. 
 Set bit RTCEN in the control register 2 
(RCR2) to 0. 
 Set bit RCKSEL in the control register 5 
(RCR5) to 0. 
After the settings above, set bit MSTP30 to 1. 
 
33.2.4
 
Standby Control Register 4 (STBCR4) 
STBCR4 is an 8-bit readable/writable register that controls the operation of modules. 
Note:  When writing to this register, see section 33.4, Usage Notes. 
7
6
5
4
3
2
1
0
Bit:
Initial value:
R/W:
1
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
1
R/W
1
R/W
MSTP
46
MSTP
47
MSTP
45
MSTP
44
MSTP
43
MSTP
41
MSTP
40
MSTP
42