Renesas R5S72623 User Manual
Section 35 Motor Control PWM Timer
R01UH0134EJ0400 Rev. 4.00
Page 1841 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
35.4
Bus Master Interface
35.4.1
16-Bit Data Registers
PWCYR_n and PWBFR_n are 16-bit registers. These registers are linked to the bus master by a
16-bit data bus, and can be read or written in 16-bit units. They cannot be read or written by 8-bit
access; 16-bit access must always be used.
16-bit data bus, and can be read or written in 16-bit units. They cannot be read or written by 8-bit
access; 16-bit access must always be used.
H
L
PWCYR
Bus
master
master
Internal data bus
Bus
interface
Module
data bus
data bus
Figure 35.5 16-Bit Register Access Operation (Bus Master
PWCYR_n (16 Bits))
35.4.2
8-Bit Data Registers
PWCR_n, PWPR_n, and PWBTCR are 8-bit registers that can be read and written to in 8-bit units.
These registers are linked to the bus master by a 16-bit data bus, and can be read or written by 16-
bit access; in this case, the lower eight bits are read as H'FF.
These registers are linked to the bus master by a 16-bit data bus, and can be read or written by 16-
bit access; in this case, the lower eight bits are read as H'FF.
H
L
PWCR
Bus
master
master
Internal data bus
Bus
interface
Module
data bus
data bus
Figure 35.6 8-Bit Register Access Operation (Bus Master
PWCR_n (Upper Eight Bits))