Renesas R5S72622 User Manual

Page of 2152
 
 
Section 11   Multi-Function Timer Pulse Unit 2 
 
Page 494 of 2108 
 
R01UH0134EJ0400  Rev. 4.00 
 
 Sep 
24, 
2014 
SH7262 Group, SH7264 Group
Table 11.36  TIOC4B Output Level Select Function 
Bit 0 
 
Function 
OLS1P    Initial Output 
Active Level 
Compare Match Output 
Up Count 
Down Count 
High level 
Low level 
Low level 
High level 
Low level 
High level 
High level 
Low level 
 
11.3.19
  Timer Output Level Buffer Register (TOLBR) 
TOLBR is an 8-bit readable/writable register that functions as a buffer for TOCR2 and specifies 
the PWM output level in complementary PWM mode and reset-synchronized PWM mode. 
Bit:
Initial value:
R/W:
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
R
R
R/W
R/W
R/W
R/W
R/W
R/W
-
-
OLS3N OLS3P OLS2N OLS2P OLS1N OLS1P
 
 
Bit Bit 
Name 
Initial 
value R/W Description 
7, 6 
 All 
Reserved 
These bits are always read as 0. The write value should 
always be 0. 
OLS3N 
R/W 
Specifies the buffer value to be transferred to the 
OLS3N bit in TOCR2. 
OLS3P 
R/W 
Specifies the buffer value to be transferred to the 
OLS3P bit in TOCR2. 
OLS2N 
R/W 
Specifies the buffer value to be transferred to the 
OLS2N bit in TOCR2. 
OLS2P 
R/W 
Specifies the buffer value to be transferred to the 
OLS2P bit in TOCR2. 
OLS1N 
R/W 
Specifies the buffer value to be transferred to the 
OLS1N bit in TOCR2. 
OLS1P 
R/W 
Specifies the buffer value to be transferred to the 
OLS1P bit in TOCR2.