Renesas R5S72626 User Manual
Section 21 IEBus
TM
Controller
R01UH0134EJ0400 Rev. 4.00
Page 1109 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
21.3.4
IEBus Master Unit Address Register 1 (IEAR1)
IEAR1 sets the lower four bits of the master unit address and communications mode. In master
communications, the master unit address becomes the master address field value. In slave
communications, the master unit address is compared with the received slave address field.
communications, the master unit address becomes the master address field value. In slave
communications, the master unit address is compared with the received slave address field.
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
Bit:
Initial value:
R/W:
IARL4
IMD
-
STE
Bit Bit
Name
Initial
Value R/W Description
Value R/W Description
7 to 4
IARL4
0000
R/W
Lower 4 Bits of IEBus Master Unit Address
Set the lower 4 bits of the master unit address. This
register becomes the master address field value. In
slave communications, the master unit address is
compared with the received slave address field.
register becomes the master address field value. In
slave communications, the master unit address is
compared with the received slave address field.
3, 2
IMD
00
R/W
IEBus Communications Mode
Set IEBus communications mode.
00: Communications mode 0
01: Communications mode 1
10: Communications mode 2
11: Setting prohibited
1
0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
always be 0.
0
STE
0
R/W
Slave Transmission Setting
Sets bit 4 in the slave status register. Transmitting the
slave status register informs the master unit that the
slave transmission enabled state is entered by setting
this bit to 1. Note that this bit only sets the slave status
register value and does not directly affect slave
transmission.
slave status register informs the master unit that the
slave transmission enabled state is entered by setting
this bit to 1. Note that this bit only sets the slave status
register value and does not directly affect slave
transmission.
0: Bit 4 in the slave status register is 0 (slave
transmission stop state)
1: Bit 4 in the slave status register is 1 (slave
transmission enabled state)