Renesas R5S72621 User Manual
Section 21 IEBus
TM
Controller
R01UH0134EJ0400 Rev. 4.00
Page 1121 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
Bit Bit
Name
Initial
Value R/W Description
Value R/W Description
0
GG
0
R
General Broadcast Reception Acknowledgement
Set to 1 when the slave address is acknowledged as
H'FFF in broadcast reception. Like the receive
broadcast bit, this flag is valid when the slave/broadcast
reception is started. (This flag is changed at the time of
setting the RXS flag in IERSR.)
H'FFF in broadcast reception. Like the receive
broadcast bit, this flag is valid when the slave/broadcast
reception is started. (This flag is changed at the time of
setting the RXS flag in IERSR.)
The previous value remains unchanged until the next
slave/broadcast reception is started. This flag is cleared
to 0 in slave normal reception.
slave/broadcast reception is started. This flag is cleared
to 0 in slave normal reception.
0: (1) A unit is in slave reception
(2) When H'FFF is not acknowledged in the slave
address field in broadcast reception
1: When H'FFF is acknowledged in the slave address
field in broadcast reception
21.3.16
IEBus Transmit Status Register (IETSR)
IETSR detects events such as transmit start, transmit normal completion, and transmit error end.
Each status flag in IETSR corresponds to a bit in the IEBus transmit interrupt enable register
(IEIET) that enables or disables each interrupt. This register is cleared by writing 1 to each bit.
Each status flag in IETSR corresponds to a bit in the IEBus transmit interrupt enable register
(IEIET) that enables or disables each interrupt. This register is cleared by writing 1 to each bit.
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
R
R/(W)
* R/(W)*
R
R/(W)
* R/(W)* R/(W)* R/(W)*
Bit:
Initial value:
R/W:
-
TXS
TXF
-
TXEAL TXETTME TXERO
TXEACK
Bit Bit
Name
Initial
Value R/W Description
Value R/W Description
7
0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
always be 0.