Renesas R5S72621 User Manual
Section 23 CD-ROM Decoder
R01UH0134EJ0400 Rev. 4.00
Page 1225 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
23.3.30
Post-ECC Correction Header: Seconds Data Register (HEAD21)
The post-ECC correction header: seconds data register (HEAD21) indicates the seconds value in
the header after ECC correction.
the header after ECC correction.
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
R
R
R
R
R
R
R
R
Bit:
Initial value:
R/W:
HEAD21[7:0]
Bit Bit
Name
Initial
Value R/W
Value R/W
Description
7 to 0
HEAD21
[7:0]
[7:0]
All 0
R
Seconds Value in Header After ECC Correction
When MSF_LBA_SEL = 1, this register indicates the
second byte of the total number of sectors calculated
from M, S, and F.
from M, S, and F.
23.3.31
Post-ECC Correction Header: Frames (1/75 Second) Data Register (HEAD22)
The post-ECC correction header: frames (1/75 second) data register (HEAD22) indicates the
frames value (1 frame = 1/75 seconds) in the header after ECC correction.
frames value (1 frame = 1/75 seconds) in the header after ECC correction.
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
R
R
R
R
R
R
R
R
Bit:
Initial value:
R/W:
HEAD22[7:0]
Bit Bit
Name
Initial
Value R/W
Value R/W
Description
7 to 0
HEAD22
[7:0]
[7:0]
All 0
R
Frames Value in Header After ECC Correction
When MSF_LBA_SEL = 1, this register indicates the
third byte of the total number of sectors calculated from
M, S, and F.
M, S, and F.