Renesas R5S72621 User Manual

Page of 2152
 
Section 23   CD-ROM Decoder 
Page 1248 of 2108 
 
R01UH0134EJ0400  Rev. 4.00 
 
 Sep 
24, 
2014 
SH7262 Group, SH7264 Group
23.4.3
 
Error Correction 
The CD-ROM decoder handles data in the formats containing information relevant to error 
correction, including the EDC, P parity, and Q parity. The CD-ROM decoder includes the 
following functions for use in error correction. 
  Syndrome calculation 
  ECC correction 
  EDC checking 
 
(1)  Syndrome Calculation 
After the data of a sector in Mode 1 or Form 1 of Mode 2 has been input, the ECC is used in 
correction if any error is detected (the result of syndrome calculation is non-zero). After 
correction, the results of syndrome operation for the corrected data are output to bits ST_ECCP (P 
parity) and ST_ECCQ (Q parity) in the CROMST6 register, respectively. 
(2)  ECC correction and EDC Checking 
For CD-ROM format data that contains EDC, P-parity, and Q-parity fields, the CD-ROM decoder 
performs EDC checking and ECC correction. Supported correction modes are P correction, Q 
correction, PQ correction (P correction followed by Q correction), and QP correction (Q 
correction followed by P correction). In PQ and QP correction modes, up to three iterations of 
correction are possible (the number of iterations is limited by the playback speed). 
The EDC check is performed twice, before and after correction.  
The mode of ECC correction and EDC checking is specified by bits MD_DEC[2:0] in the 
CROMCTL1 register. When the PQ or QP correction mode is selected, the number of iterations is 
specified by bits MD_PQREP[1:0] in the CROMCTL1 register. 
When the automatic mode/form detection function is in use, the sector mode determines whether 
or not ECC correction and EDC checking can be performed. For sectors in Mode 0 and Mode 2 
(non-XA), which include neither parity bits nor EDC, ECC correction and EDC checking are not 
performed. For sectors in Form 2 of Mode 2, ECC correction is not performed. 
(a)  ECC Correction 
When ECC correction is in use and an error in a sector is identified as non-correctable, the CD-
ROM decoder generates an IERR interrupt and sets the ST_ECCNG bit of the CROMST6 register 
to 1. The CD-ROM detector also sets this bit to 1 on detecting a short sector.