Renesas R5S72621 User Manual
Section 27 Video Display Controller 3
Page 1590 of 2108
R01UH0134EJ0400 Rev. 4.00
Sep
24,
2014
SH7262 Group, SH7264 Group
27.7.13
Video Line Buffer Count Register (VIDEO_LINEBUFF_NUM)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R
R
R
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
VIDEO_LINEBUFF_NUM[8:0]
Bit:
Initial value:
R/W:
Bit:
Initial value:
R/W:
Bit Bit
Name
Initial
Value R/W
Value R/W
Description
31 to 9
All
0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
should always be 0.
8 to 0
VIDEO_
LINEBUFF_
NUM[8:0]
LINEBUFF_
NUM[8:0]
H'000
R/W
These bits specify how many lines of buffer area
are used in the video display mode.
are used in the video display mode.
0: One line of buffer area is used.
1: Two lines of buffer area are used.
:
1FF: 512 lines of buffer area are used.