Renesas R5S72621 User Manual
Section 27 Video Display Controller 3
R01UH0134EJ0400 Rev. 4.00
Page 1609 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
27.7.27
Chroma-Key Color Registers (GROPCRKY1_1 and GROPCRKY1_2)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R
R
R
R
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
-
-
-
-
-
-
-
-
ALPHA[7:0]
R[4:0]
G[5:0]
B[4:0]
Bit:
Initial value:
R/W:
Bit:
Initial value:
R/W:
Bit Bit
Name
Initial
Value R/W Description
Value R/W Description
31 to 24
All
0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
should always be 0.
23 to 16
ALPHA[7:0] H'00
R/W
These bits specify the
value after replacement.
15 to 11
R[4:0]
00000
R/W
These bits specify the R value after replacement.
10 to 5
G[5:0]
000000
R/W
These bits specify the G value after replacement.
4 to 0
B[4:0]
00000
R/W
These bits specify the B value after replacement.
Note: When the bus format is
RGB444, only the R[3:0], G[3:0], and B[3:0] bits are valid.
Each register specifies a set of color information to replace the color that matches the chroma-key
target RGB values.
target RGB values.
calculation is done as follows.
Output R = R (current layer)
+ R (lower layer) (1 – )
Output G = G (current layer)
+ G (lower layer) (1 – )
Output B = B (current layer)
+ B (lower layer) (1 – )