Renesas R5S72621 User Manual
Section 27 Video Display Controller 3
Page 1632 of 2108
R01UH0134EJ0400 Rev. 4.00
Sep
24,
2014
SH7262 Group, SH7264 Group
(b) Register settings for horizontal position
Specify the horizontal position in the VIDEO_DISP_HSTART with respect to the Hsync. The
offset value is + 16.
offset value is + 16.
27.8.4
How to Use Graphics Display
As graphics blocks 1 and 2 can be used in the same way, this section describes the register settings
for graphics display using the register names in graphics block 1.
for graphics display using the register names in graphics block 1.
Table 27.23 Register Settings for Starting Graphics Display
Register Name
Setting
GRA_VSYNC_TIM
Specify the line number for displaying graphics counted from the
reference VSYNC position.
reference VSYNC position.
GRCBUSCNT1[0] H'0
(IV3-BUS is a big-endian bus)
GRCBUSCNT1[4]
Select the data format for IV3-BUS.
GRCBUSCNT1[8]
Select the mode of transfer through IV3-BUS
GROPSADR1
Specify the read address.
GROPSWH1
Specify the graphics image size.
GROPSOFST1
Specify the line offset for the graphics image.
GROPDPHV1
Specify the graphics image start position.
GROPBASERGB1
Specify the color for outside of the graphics image area.
GRCMEN1[0]
Set to H'1 when displaying the lower layer.
GRCMEN1[1], [31]
H'1, H'1 (This setting starts displaying graphics images. Set these
bits at the end of the procedure.)
bits at the end of the procedure.)