Renesas R5S72621 User Manual

Page of 2152
 
Section 28   Sampling Rate Converter 
R01UH0134EJ0400  Rev. 4.00  
 
Page 1659 of 2108 
Sep 24, 2014 
 
 
 
SH7262 Group, SH7264 Group 
28.3.2
 
Data Input 
Figure 28.3 is a sample flowchart for data input. 
Start data input
Read the IINT bit in SRCSTAT.
Write the data to be converted to 
SRCID and clear the IINT bit to 0.
Set the FL bit in SRCCTRL to 1.
Data input completed
IINT = 1?
No
No
Yes
Yes
Has all the data  
been input?
 
Figure 28.3   Sample Flowchart for Data Input 
(1)  When Interrupts are Issued to CPU 
1.  Set the IEN bit in SRCIDCTRL to 1. 
2.  When the IINT bit in SRCSTAT is set to 1, the IDE interrupt request is issued. In the interrupt 
processing routine, read the IINT bit and confirm that it is 1, write data to SRCID, and write 0 
to the IINT bit. Then return from the interrupt processing routine. 
3.  Repeat step 2 until all the data has been input, and write 1 to the FL bit in SRCCTRL.