Renesas R5S72621 User Manual
Section 32 General Purpose I/O Ports
Page 1734 of 2108
R01UH0134EJ0400 Rev. 4.00
Sep
24,
2014
SH7262 Group, SH7264 Group
32.2.21
Port F I/O Register 0 (PFIOR0)
PFIOR0 is a 16-bit readable/writable register that is used to set the pins on port F as inputs or
outputs. The PF12IOR to PF0IOR bits correspond to the PF12 to PF0 pins, respectively. PFIOR0
is enabled when the port F pins are functioning as general-purpose I/O (PF12 to PF0) or TIOC I/O
of multi-function timer pulse unit 2. In other states, they are disabled. If a bit in PFIOR0 is set to
1, the corresponding pin on port F functions as an output. If it is cleared to 0, the corresponding
pin functions as an input.
outputs. The PF12IOR to PF0IOR bits correspond to the PF12 to PF0 pins, respectively. PFIOR0
is enabled when the port F pins are functioning as general-purpose I/O (PF12 to PF0) or TIOC I/O
of multi-function timer pulse unit 2. In other states, they are disabled. If a bit in PFIOR0 is set to
1, the corresponding pin on port F functions as an output. If it is cleared to 0, the corresponding
pin functions as an input.
Bits 15 to 13 in PFIOR0 are reserved. This bit is always read as 0. The write value should always
be 0.
be 0.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
-
-
PF12
IOR
PF11
IOR
PF10
IOR
PF9
IOR
IOR
PF8
IOR
IOR
PF7
IOR
IOR
PF6
IOR
IOR
PF5
IOR
IOR
PF4
IOR
IOR
PF3
IOR
IOR
PF2
IOR
IOR
PF1
IOR
IOR
PF0
IOR
IOR
-
Bit:
Initial value:
R/W:
32.2.22
Port F Data Register 0 (PFDR0)
PFDR0 is a 16-bit readable/writable register that stores port F data. The PF12DR to PF0DR bits
correspond to the PF12 to PF pins respectively.
correspond to the PF12 to PF pins respectively.
When a pin function is general output, if a value is written to PFDR0, that value is output directly
from the pin, and if PEDR0 is read, the register value is returned directly regardless of the pin
state.
from the pin, and if PEDR0 is read, the register value is returned directly regardless of the pin
state.
When a pin function is general input, if PFDR0 is read, the pin state, not the register value, is
returned directly. If a value is written to PFDR0, although that value is written into PFDR0, it does
not affect the pin state. Table 32.18 summarizes PFDR0 read/write operation.
returned directly. If a value is written to PFDR0, although that value is written into PFDR0, it does
not affect the pin state. Table 32.18 summarizes PFDR0 read/write operation.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
-
-
PF12
DR
PF11
DR
PF10
DR
PF9
DR
PF8
DR
PF7
DR
PF6
DR
PF5
DR
PF4
DR
PF3
DR
PF2
DR
PF1
DR
PF0
DR
-
Bit:
Initial value:
R/W: