Renesas R5S72621 User Manual

Page of 2152
 
Section 35   Motor Control PWM Timer 
Page 1834 of 2108 
 
R01UH0134EJ0400  Rev. 4.00 
 
 Sep 
24, 
2014 
SH7262 Group, SH7264 Group
Bit Bit 
Name 
Initial 
Value R/W Description 
3 CST  0  R/W 
Counter 
Start 
Selects starting or stopping of PWCNT_n of the 
corresponding channel. 
0: PWCNT_n is stopped 
1: PWCNT_n is started 
CKS2 
CKS1 
CKS0 
R/W 
R/W 
R/W 
Clock Select 
These bits select the operating clock for PWCNT_n of 
the corresponding channel. 
000: Counts on P
/1 
001: Counts on P
/2 
010: Counts on P
/4 
011: Counts on P
/8 
1XX: Counts on P
/16 
[Legend] 
X:   Don't care 
Note:  *  Only 0 can be written, to clear the flag. 
 
35.3.2
 
PWM Polarity Register_n (PWPR_n) (n = 1, 2) 
PWPR_n selects the PWM output polarity. 
7
OPSnH
0
R/W
6
OPSnG
0
R/W
5
OPSnF
0
R/W
4
OPSnE
0
R/W
3
OPSnD
0
R/W
0
OPSnA
0
R/W
2
OPSnC
0
R/W
1
OPSnB
0
R/W
Bit
Bit Name
Initial Value
R/W