Renesas R5S72621 User Manual
Section 37 Electrical Characteristics
Page 2042 of 2108
R01UH0134EJ0400 Rev. 4.00
Sep
24,
2014
SH7262 Group, SH7264 Group
37.4.18
User Debugging Interface Timing
Table 37.24 User Debugging Interface Timing
Item Symbol
Min.
Max.
Unit
Figure
TCK cycle time
t
TCKcyc
50*
ns Figure
37.77
TCK high pulse width
t
TCKH
0.4 0.6 t
TCKcyc
TCK low pulse width
t
TCKL
0.4 0.6 t
TCKcyc
TDI setup time
t
TDIS
10
ns Figure
37.78
TDI hold time
t
TDIH
10
ns
TMS setup time
t
TMSS
10
ns
TMS hold time
t
TMSH
10
ns
TDO delay time
t
TDOD
16 ns
Note: * Should be greater than the peripheral clock (P
) cycle time.
t
TCKcyc
V
IH
1/2 PVcc
1/2 PVcc
V
IH
V
IL
V
IL
V
IH
t
TCKL
t
TCKH
Figure 37.77 TCK Input Timing