Renesas R5S72621 User Manual

 

 

 

 

Section 7   Interrupt Controller 

 

R01UH0134EJ0400  Rev. 4.00  

 

Page 201 of 2108 

Sep 24, 2014 

 

 

 
SH7262 Group, SH7264 Group 

This LSI has fifteen register banks used to perform register saving and restoration required in the 
interrupt processing at high speed. Figure 7.10 shows the register bank configuration. 

General 
registers

Bank control register

Bank number register

Bank control registers (interrupt controller)

Banked register

Vector table address offset

Note:

Interrupt generated

(save)

RESBANK 

instruction

(restore)

Registers

Register banks

Bank 0

Bank 1

....

Bank 14

R0
R1

:

:

R14
R15

SR

GBR

VBR
TBR

MACH

MACL

PR
PC

Control 
registers

System 
registers

R0
R1

:

:

R14

GBR

VTO

VTO:

IBCR

IBNR

MACH

MACL

PR

: