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Renesas R5S72621 User Manual

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Section 11   Multi-Function Timer Pulse Unit 2 
 
R01UH0134EJ0400  Rev. 4.00  
 
Page 491 of 2108 
Sep 24, 2014 
 
 
 
SH7262 Group, SH7264 Group 
11.3.18
  Timer Output Control Register 2 (TOCR2) 
TOCR2 is an 8-bit readable/writable register that controls output level inversion of PWM output 
in complementary PWM mode and reset-synchronized PWM mode. 
Bit:
Initial value:
R/W:
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
BF[1:0]
OLS3N OLS3P OLS2N OLS2P OLS1N OLS1P
 
 
Bit Bit 
Name 
Initial 
value R/W Description 
7, 6 
BF[1:0] 
00 
R/W 
TOLBR Buffer Transfer Timing Select 
These bits select the timing for transferring data from 
TOLBR to TOCR2. 
For details, see table 11.30. 
5 
OLS3N 
0 
R/W 
Output Level Select 3N* 
This bit selects the output level on TIOC4D in reset-
synchronized PWM mode/complementary PWM mode. 
See table 11.31. 
4 
OLS3P 
0 
R/W 
Output Level Select 3P* 
This bit selects the output level on TIOC4B in reset-
synchronized PWM mode/complementary PWM mode. 
See table 11.32. 
3 
OLS2N 
0 
R/W 
Output Level Select 2N* 
This bit selects the output level on TIOC4C in reset-
synchronized PWM mode/complementary PWM mode. 
See table 11.33. 
2 
OLS2P 
0 
R/W 
Output Level Select 2P* 
This bit selects the output level on TIOC4A in reset-
synchronized PWM mode/complementary PWM mode. 
See table 11.34. 
1 
OLS1N 
0 
R/W 
Output Level Select 1N* 
This bit selects the output level on TIOC3D in reset-
synchronized PWM mode/complementary PWM mode. 
See table 11.35.