Renesas R5S72621 User Manual

 

 

Section 11   Multi-Function Timer Pulse Unit 2 
 

Page 580 of 2108 

 

R01UH0134EJ0400  Rev. 4.00 

 

 Sep 

24, 

2014 

SH7262 Group, SH7264 Group

Note:  This function must be used in combination with interrupt skipping. 

When interrupt skipping is disabled (the T3AEN and T4VEN bits in the timer interrupt 
skipping set register (TITCR) are cleared to 0 or the skipping count set bits (3ACOR and 
4VCOR) in TITCR are cleared to 0), make sure that A/D converter start requests are not 
linked with interrupt skipping (clear the ITA3AE, ITA4VE, ITB3AE, and ITB4VE bits in 
the timer A/D converter start request control register (TADCR) to 0).  

TADCORA_4

TCNT_4

A/D converter start request (TRG4AN)

Note: *    When the interrupt skipping count is set to two.

TGIA_3 interrupt

 skipping counter

TCIV_4 interrupt

 skipping counter

TGIA_3 A/D request-enabled

 period

TCIV_4 A/D request-enabled

 period

When linked with TGIA_3 and TCIV_4 

interrupt skipping

When linked with TGIA_3 

interrupt skipping

When linked with TCIV_4 

interrupt skipping

00

01

00

01

02

00

01

00

01

02

(UT4AE/DT4AE = 1)