Renesas SH7262 R5S72620 User Manual
Section 2 CPU
Page 62 of 2108
R01UH0134EJ0400 Rev. 4.00
Sep
24,
2014
SH7262 Group, SH7264 Group
Addressing
Mode
Mode
Instruction
Format
Format
Effective Address Calculation
Equation
Indexed GBR
indirect
indirect
@(R0, GBR)
The effective address is the sum of GBR value
and R0.
and R0.
GBR
R0
GBR + R0
+
GBR + R0
TBR duplicate
indirect with
displacement
indirect with
displacement
@@
(disp:8,
TBR)
The effective address is the sum of TBR value
and an 8-bit displacement (disp). The value of
disp is zero-extended, and is multiplied by 4.
and an 8-bit displacement (disp). The value of
disp is zero-extended, and is multiplied by 4.
TBR
TBR
+ disp
× 4
(TBR
+ disp
× 4)
4
+
disp
(zero-extended)
×
Contents of
address (TBR
+ disp
address (TBR
+ disp
4)
PC indirect with
displacement
displacement
@(disp:8,
PC)
The effective address is the sum of PC value and
an 8-bit displacement (disp). The value of disp is
zero-extended, and is doubled for a word
operation, and quadrupled for a longword
operation. For a longword operation, the lowest
two bits of the PC value are masked.
an 8-bit displacement (disp). The value of disp is
zero-extended, and is doubled for a word
operation, and quadrupled for a longword
operation. For a longword operation, the lowest
two bits of the PC value are masked.
PC
H'FFFFFFFC
PC + disp
× 2
or
PC & H'FFFFFFFC
+ disp
× 4
+
2/4
×
&
(for longword)
disp
(zero-extended)
Word:
PC + disp
PC + disp
2
Longword:
PC &
H'FFFFFFFC +
disp
PC &
H'FFFFFFFC +
disp
4