Renesas R5S72643 User Manual

Page of 2152
 
Section 26   USB 2.0 Host/Function Module 
R01UH0134EJ0400  Rev. 4.00  
 
Page 1361 of 2108 
Sep 24, 2014 
 
 
 
SH7262 Group, SH7264 Group 
Bit Bit 
Name 
Initial 
Value R/W Description 
2 to 0 
RHST[2:0] 
000 
Reset Handshake 
Indicates the status of the reset handshake. 
(1) When the host controller function is selected 
000:  Communication speed not determined 
(powered state or no connection) 
1xx:  Reset handshake in progress 
001: Low-speed connection 
010: Full-speed connection 
011: High-speed connection 
These bits indicate 100 after 1 has been written to 
USBRST. 
If HSE has been set to 1, these bits indicate 111 as 
soon as this module detects Chirp-K from the 
peripheral device. 
This module fixes the value of the RHST bits when 0 
is written to USBRST and this module completes 
SE0 driving. 
When the UTST bits are set to 1xxx (when a host 
test mode is specified), the RHST bits indicate 011. 
(2) When the function controller function is selected 
000: Communication speed not determined  
100: Reset handshake in progress 
010: Full-speed connection 
011: High-speed connection 
If HSE has been set to 1, these bits indicate 100 as 
soon as this module detects the USB bus reset. 
Then, these bits indicate 011 as soon as this module 
outputs Chirp-K and detects Chirp-JK from the USB 
host three times. If the connection speed is not fixed 
to high speed within 2.5 ms after Chirp-K output, 
these bits indicate 010. 
If HSE has been set to 0, these bits indicate 010 as 
soon as this module detects the USB bus reset. 
A DVST interrupt is generated as soon as this 
module detects the USB bus reset and then the 
value of the RHST bits is fixed to 010 or 011.  
Note:  *  Only 1 can be written.