Renesas R5S72643 User Manual

 

 

Section 11   Multi-Function Timer Pulse Unit 2 
 

Page 468 of 2108 

 

R01UH0134EJ0400  Rev. 4.00 

 

 Sep 

24, 

2014 

SH7262 Group, SH7264 Group

  TIER2_0 

Bit:

Initial value:

R/W:

7

6

5

4

3

2

1

0

0

0

0

0

0

0

0

0

R/W

R

R

R

R

R

R/W

R/W

TTGE2

-

-

-

-

-

TGIEF TGIEE

 

 

7 

TTGE2 

0 

R/W 

A/D Converter Start Request Enable 2 

Enables or disables generation of A/D converter start 
requests by compare match between TCNT_0 and 
TGRE_0. 

0: A/D converter start request generation by compare 

match between TCNT_0 and TGRE_0 disabled 

1: A/D converter start request generation by compare 

match between TCNT_0 and TGRE_0 enabled 

6 to 2 



 All 

0 

R 

Reserved 

These bits are always read as 0. The write value should 
always be 0. 

1 

TGIEF 

0 

R/W 

TGR Interrupt Enable F 

Enables or disables interrupt requests by compare 
match between TCNT_0 and TGRF_0. 

0: Interrupt requests (TGIF) by TGFE bit disabled 

1: Interrupt requests (TGIF) by TGFE bit enabled 

0 

TGIEE 

0 

R/W 

TGR Interrupt Enable E 

Enables or disables interrupt requests by compare 
match between TCNT_0 and TGRE_0. 

0: Interrupt requests (TGIE) by TGEE bit disabled 

1: Interrupt requests (TGIE) by TGEE bit enabled