Renesas R5S72643 User Manual
Section 2 CPU
R01UH0134EJ0400 Rev. 4.00
Page 59 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
(11) Absolute Address
When data is accessed by an absolute address, the absolute address value should be placed in the
memory table in advance. That value is transferred to the register by loading the immediate data
during the execution of the instruction, and the data is accessed in register indirect addressing
mode.
memory table in advance. That value is transferred to the register by loading the immediate data
during the execution of the instruction, and the data is accessed in register indirect addressing
mode.
With the SH-2A, when data is referenced using an absolute address not exceeding 28 bits, it is also
possible to transfer immediate data located in the instruction code to a register and to reference the
data in register indirect addressing mode. However, when referencing data using an absolute
address of 21 to 28 bits, an OR instruction must be used after the data is transferred to a register.
possible to transfer immediate data located in the instruction code to a register and to reference the
data in register indirect addressing mode. However, when referencing data using an absolute
address of 21 to 28 bits, an OR instruction must be used after the data is transferred to a register.
Table 2.6
Absolute Address Accessing
Classification
SH-2A CPU
Example of Other CPU
Up to 20 bits
MOVI20 #H'12345,R1
MOV.B @R1,R0
MOV.B @H'12345,R0
21 to 28 bits
MOVI20S #H'12345,R1
OR #H'67,R1
MOV.B @R1,R0
MOV.B @H'1234567,R0
29 bits or more
MOV.L @(disp,PC),R1
MOV.B @R1,R0
..................
.DATA.L H'12345678
MOV.B @H'12345678,R0
(12) 16-Bit/32-Bit Displacement
When data is accessed by 16-bit or 32-bit displacement, the displacement value should be placed
in the memory table in advance. That value is transferred to the register by loading the immediate
data during the execution of the instruction, and the data is accessed in the indexed indirect
register addressing mode.
in the memory table in advance. That value is transferred to the register by loading the immediate
data during the execution of the instruction, and the data is accessed in the indexed indirect
register addressing mode.
Table 2.7
Displacement Accessing
Classification
SH-2A CPU
Example of Other CPU
16-bit displacement
MOV.W @(disp,PC),R0
MOV.W @(R0,R1),R2
..................
.DATA.W H'1234
MOV.W @(H'1234,R1),R2