Renesas R5S72647 User Manual
Section 23 CD-ROM Decoder
R01UH0134EJ0400 Rev. 4.00
Page 1249 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
While the NO_ECC bit of the CROMCTL4 register is set to 1, a ‘pass’ result in pre-correction
EDC checking makes the CD-ROM decoder skip ECC correction, regardless of the results of the
syndrome operation.
EDC checking makes the CD-ROM decoder skip ECC correction, regardless of the results of the
syndrome operation.
(b) EDC Checking
When EDC checking is in use, checking is in line with the specified or detected sector mode and
form, depending on whether or not automatic sector mode and form detection is selected.
form, depending on whether or not automatic sector mode and form detection is selected.
The results of EDC checking before and after correction are reflected in the ST_EDC1 and
ST_EDC2 bits of the CROMST6 register, respectively. If EDC checking after ECC correction
indicates that an error remains, an IERR interrupt is generated.
ST_EDC2 bits of the CROMST6 register, respectively. If EDC checking after ECC correction
indicates that an error remains, an IERR interrupt is generated.
23.4.4
Automatic Decoding Stop Function
Decoding can be stopped automatically in response to an error during the decoding of CD-ROM
data.
data.
The possible conditions for automatically stopping the decoding process are listed below. The
applicable conditions are specified in the CROMCTL3 register.
applicable conditions are specified in the CROMCTL3 register.
An error is found to be not correctable by ECC correction.
Post-correction EDC checking indicates that an error remains.
A change of the sector mode or form.
A non-sequential MSF (minutes, seconds, frames (1/75 second)) value.
When automatic stopping is set up and any of the above conditions is encountered in a certain
sector, the decoding is stopped after the results of decoding for that sector have been output.
Post-correction EDC checking indicates that an error remains.
A change of the sector mode or form.
A non-sequential MSF (minutes, seconds, frames (1/75 second)) value.
When automatic stopping is set up and any of the above conditions is encountered in a certain
sector, the decoding is stopped after the results of decoding for that sector have been output.
After decoding has been stopped in response to a condition specified in the CROMCTL3 register,
the condition can be identified by reading the CBUFST1 register.
the condition can be identified by reading the CBUFST1 register.
The CD-ROM decoder has buffer space for two sectors. If input of the data stream continues and
the output stream of data is not read, the CD-ROM decoder stops at the point where the data of a
third sector starts to be input. At this time, the BUF_NG bit in the CBUFST2 register is set to 1,
but no interrupt is generated. Once the BUF_NG bit in the CBUFST2 register has been set to 1,
recovery can only be accomplished by using the LOGICRST bit in the ROMDECRST register to
reset the CD-ROM decoder function. When the LOGICRST bit in the ROMDECRST register is
set to 1, a reset signal is output and any registers in which settings have been made are cleared to
their initial values.
the output stream of data is not read, the CD-ROM decoder stops at the point where the data of a
third sector starts to be input. At this time, the BUF_NG bit in the CBUFST2 register is set to 1,
but no interrupt is generated. Once the BUF_NG bit in the CBUFST2 register has been set to 1,
recovery can only be accomplished by using the LOGICRST bit in the ROMDECRST register to
reset the CD-ROM decoder function. When the LOGICRST bit in the ROMDECRST register is
set to 1, a reset signal is output and any registers in which settings have been made are cleared to
their initial values.