Renesas R5S72646 User Manual
Section 11 Multi-Function Timer Pulse Unit 2
Page 578 of 2108
R01UH0134EJ0400 Rev. 4.00
Sep
24,
2014
SH7262 Group, SH7264 Group
11.4.9
A/D Converter Start Request Delaying Function
A/D converter start requests can be issued in channel 4 by making settings in the timer A/D
converter start request control register (TADCR), timer A/D converter start request cycle set
registers (TADCORA_4 and TADCORB_4), and timer A/D converter start request cycle set
buffer registers (TADCOBRA_4 and TADCOBRB_4).
converter start request control register (TADCR), timer A/D converter start request cycle set
registers (TADCORA_4 and TADCORB_4), and timer A/D converter start request cycle set
buffer registers (TADCOBRA_4 and TADCOBRB_4).
The A/D converter start request delaying function compares TCNT_4 with TADCORA_4 or
TADCORB_4, and when their values match, the function issues a respective A/D converter start
request (TRG4AN or TRG4BN).
TADCORB_4, and when their values match, the function issues a respective A/D converter start
request (TRG4AN or TRG4BN).
A/D converter start requests (TRG4AN and TRG4BN) can be skipped in coordination with
interrupt skipping by setting the ITA3AE, ITA4VE, ITB3AE, and ITB4VE bits in TADCR.
interrupt skipping by setting the ITA3AE, ITA4VE, ITB3AE, and ITB4VE bits in TADCR.
Example of Procedure for Specifying A/D Converter Start Request Delaying Function
Figure 11.73 shows an example of procedure for specifying the A/D converter start request
delaying function.
delaying function.
Set A/D converter start request cycle
A/D converter start request
delaying function
• Set the timing of transfer
from cycle set buffer register
• Set linkage with interrupt skipping
from cycle set buffer register
• Set linkage with interrupt skipping
• Enable A/D converter start
request delaying function
request delaying function
A/D converter start request
delaying function
[1]
[2]
[1] Set the cycle in the timer A/D converter start request cycle
buffer register (TADCOBRA_4 or TADCOBRB_4) and timer
A/D converter start request cycle register (TADCORA_4 or
TADCORB_4). (The same initial value must be specified in
the cycle buffer register and cycle register.)
A/D converter start request cycle register (TADCORA_4 or
TADCORB_4). (The same initial value must be specified in
the cycle buffer register and cycle register.)
[2] Use bits BF1 and BF2 in the timer A/D converter start
request control register (TADCR) to specify the timing of
transfer from the timer A/D converter start request cycle
buffer register to A/D converter start request cycle register.
transfer from the timer A/D converter start request cycle
buffer register to A/D converter start request cycle register.
• Specify whether to link with interrupt skipping through bits
ITA3AE, ITA4VE, ITB3AE, and ITB4VE.
• Use bits TU4AE, DT4AE, UT4BE, and DT4BE to enable
A/D conversion start requests (TRG4AN or TRG4BN).
Notes: 1. Perform TADCR setting while TCNT_4 is stopped.
2. Do not set BF1 to 1 when complementary PWM mode
2. Do not set BF1 to 1 when complementary PWM mode
is not selected.
3. Do not set ITA3AE, ITA4VE, ITB3AE, ITB4VE,
DT4AE, or DT4BE to 1 when complementary PWM
mode is not selected.
mode is not selected.
Figure 11.73 Example of Procedure for Specifying A/D Converter
Start Request Delaying Function