Intel 2 Quad Q8400S BX80580Q8400S Data Sheet
Product codes
BX80580Q8400S
Datasheet
31
Electrical Specifications
2.8.3
Phase Lock Loop (PLL) and Filter
An on-die PLL filter solution will be implemented on the processor. The VCCPLL input is
used for the PLL. Refer to
for DC specifications.
2.8.4
BCLK[1:0] Specifications
NOTES:
1.
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
Crossing voltage is defined as the instantaneous voltage value when the rising edge of
BCLK0 equals the falling edge of BCLK1.
BCLK0 equals the falling edge of BCLK1.
3.
“Steady state” voltage, not including overshoot or undershoot.
4.
Overshoot is defined as the absolute value of the maximum voltage. Undershoot is defined
as the absolute value of the minimum voltage.
as the absolute value of the minimum voltage.
5.
Measurement taken from differential waveform.
Table 17.
BSEL[2:0] Frequency Table for BCLK[1:0]
BSEL2
BSEL1
BSEL0
FSB Frequency
L
L
L
266 MHz
L
L
H
Reserved
L
H
H
Reserved
L
H
L
Reserved
H
H
L
Reserved
H
H
H
Reserved
H
L
H
Reserved
H
L
L
333 MHz
Table 18.
Front Side Bus Differential BCLK Specifications
Symbol
Parameter
Min
Typ
Max
Unit
Figure
Notes
1
V
L
Input Low Voltage
-0.30
N/A
N/A
V
V
H
Input High Voltage
N/A
N/A
1.15
V
V
CROSS(abs)
Absolute Crossing Point
0.300
N/A
0.550
V
2
ΔV
CROSS
Range of Crossing Points
N/A
N/A
0.140
V
-
V
OS
Overshoot
N/A
N/A
1.4
V
3
V
US
Undershoot
-0.300 N/A
N/A
V
3
V
SWING
Differential Output Swing
0.300
N/A
N/A
V
4