Intel X5450 AT80574KJ080NT Data Sheet
Product codes
AT80574KJ080NT
91
Thermal Specifications
needed by modulating (starting and stopping) the internal processor core clocks. The
temperature at which the Intel® Thermal Monitor 1 activates the thermal control circuit
is not user configurable and is not software visible. Bus traffic is snooped in the normal
manner, and interrupt requests are latched (and serviced during the time that the
clocks are on) while the TCC is active.
temperature at which the Intel® Thermal Monitor 1 activates the thermal control circuit
is not user configurable and is not software visible. Bus traffic is snooped in the normal
manner, and interrupt requests are latched (and serviced during the time that the
clocks are on) while the TCC is active.
When the Intel® Thermal Monitor 1 is enabled, and a high temperature situation exists
(that is, TCC is active), the clocks will be modulated by alternately turning the clocks
off and on at a duty cycle specific to the processor (typically 30 - 50%). Cycle times are
processor speed dependent and will decrease as processor core frequencies increase. A
small amount of hysteresis has been included to prevent rapid active/inactive
transitions of the TCC when the processor temperature is near its maximum operating
temperature. Once the temperature has dropped below the maximum operating
temperature, and the hysteresis timer has expired, the TCC goes inactive and clock
modulation ceases.
(that is, TCC is active), the clocks will be modulated by alternately turning the clocks
off and on at a duty cycle specific to the processor (typically 30 - 50%). Cycle times are
processor speed dependent and will decrease as processor core frequencies increase. A
small amount of hysteresis has been included to prevent rapid active/inactive
transitions of the TCC when the processor temperature is near its maximum operating
temperature. Once the temperature has dropped below the maximum operating
temperature, and the hysteresis timer has expired, the TCC goes inactive and clock
modulation ceases.
With thermal solutions designed to the Quad-Core Intel® Xeon® Processor X5482,
Quad-Core Intel® Xeon® Processor X5400 Series, and Quad-Core Intel® Xeon®
Processor E5400 Series, and Quad-Core Intel® Xeon® Processor L5400 Series Thermal
Profile, it is anticipated that the TCC would only be activated for very short periods of
time when running the most power intensive applications. The processor performance
impact due to these brief periods of TCC activation is expected to be so minor that it
would be immeasurable. Refer to the Quad-Core Intel® Xeon® Processor 5400 Series
Thermal/Mechanical Design Guidelines (TMDG) for information on designing a thermal
solution.
Quad-Core Intel® Xeon® Processor X5400 Series, and Quad-Core Intel® Xeon®
Processor E5400 Series, and Quad-Core Intel® Xeon® Processor L5400 Series Thermal
Profile, it is anticipated that the TCC would only be activated for very short periods of
time when running the most power intensive applications. The processor performance
impact due to these brief periods of TCC activation is expected to be so minor that it
would be immeasurable. Refer to the Quad-Core Intel® Xeon® Processor 5400 Series
Thermal/Mechanical Design Guidelines (TMDG) for information on designing a thermal
solution.
The duty cycle for the TCC, when activated by the Intel® Thermal Monitor 1, is factory
configured and cannot be modified. The Intel® Thermal Monitor 1 does not require any
additional hardware, software drivers, or interrupt handling routines.
configured and cannot be modified. The Intel® Thermal Monitor 1 does not require any
additional hardware, software drivers, or interrupt handling routines.
6.2.1.2
Intel® Thermal Monitor 2
The Quad-Core Intel® Xeon® Processor 5400 Series adds supports for an Enhanced
Thermal Monitor capability known as Intel® Thermal Monitor 2). This mechanism
provides an efficient means for limiting the processor temperature by reducing the
power consumption within the processor. Intel® Thermal Monitor 2 requires support for
dynamic VID transitions in the platform.
Thermal Monitor capability known as Intel® Thermal Monitor 2). This mechanism
provides an efficient means for limiting the processor temperature by reducing the
power consumption within the processor. Intel® Thermal Monitor 2 requires support for
dynamic VID transitions in the platform.
Note:
Not all Quad-Core Intel® Xeon® Processor 5400 Series are capable of supporting
Intel® Thermal Monitor 2. More detail on which processor frequencies will support
Intel® Thermal Monitor 2 will be provided in future releases of the Quad-Core Intel®
Xeon® Processor 5400 Series Thermal/Mechanical Design Guidelines (TMDG) when
available. For more details also refer to the Intel® 64 and IA-32 Architectures Software
Developer’s Manual.
When Intel® Thermal Monitor 2 is enabled, and a high temperature situation is
detected, the Thermal Control Circuit (TCC) will be activated for both processor cores.
The TCC causes the processor to adjust its operating frequency (via the bus multiplier)
and input voltage (via the VID signals). This combination of reduced frequency and VID
results in a reduction to the processor power consumption.
detected, the Thermal Control Circuit (TCC) will be activated for both processor cores.
The TCC causes the processor to adjust its operating frequency (via the bus multiplier)
and input voltage (via the VID signals). This combination of reduced frequency and VID
results in a reduction to the processor power consumption.
A processor enabled for Intel® Thermal Monitor 2 includes two operating points, each
consisting of a specific operating frequency and voltage, which is identical for both
processor cores. The first operating point represents the normal operating condition for
the processor. Under this condition, the core-frequency-to-system-bus multiplier
utilized by the processor is that contained in the CLOCK_FLEX_MAX MSR and the VID
that is specified in
consisting of a specific operating frequency and voltage, which is identical for both
processor cores. The first operating point represents the normal operating condition for
the processor. Under this condition, the core-frequency-to-system-bus multiplier
utilized by the processor is that contained in the CLOCK_FLEX_MAX MSR and the VID
that is specified in