IBM Intel Xeon E5504 46D1351 User Manual
Product codes
46D1351
Register Description
46
Intel® Xeon® Processor 5500 Series Datasheet, Volume 2
2.5.3
RID - Revision Identification Register
This register contains the revision number of the processor. The Revision ID (RID) is a
traditional 8-bit Read Only (RO) register located at offset 08h in the standard PCI
header of every PCI/PCI Express compatible device and function.
traditional 8-bit Read Only (RO) register located at offset 08h in the standard PCI
header of every PCI/PCI Express compatible device and function.
2.5.4
CCR - Class Code Register
This register contains the Class Code for the device. Writes to this register have no
effect.
effect.
Device:
0
Function:
0-1
Offset:
08h
Device:
2
Function:
0-1, 4-5
Offset:
08h
Device:
3
Function:
0-2, 4
Offset:
08h
Device:
4-6
Function:
0-3
Offset:
08h
Bit
Type
Reset
Value
Description
7:0
RO
0h
Revision Identification Number
0: A Stepping
1: A Stepping
2: B Stepping
4: C Stepping
5: D Stepping
Others: RSVD
0: A Stepping
1: A Stepping
2: B Stepping
4: C Stepping
5: D Stepping
Others: RSVD
Device:
0
Function:
0-1
Offset:
09h
Device:
2
Function:
0-1, 4-5
Offset:
09h
Device:
3
Function:
0-2, 4
Offset:
09h
Device:
4-6
Function:
0-3
Offset:
09h
Bit
Type
Reset
Value
Description
23:16
RO
06h
Base Class.
This field indicates the general device category. For the processor, this field is
This field indicates the general device category. For the processor, this field is
hardwired to 06h, indicating it is a “Bridge Device”.
15:8
RO
0
Sub-Class.
This field qualifies the Base Class, providing a more detailed specification of
This field qualifies the Base Class, providing a more detailed specification of
the device function.
For all devices the default is 00h, indicating “Host Bridge”.
For all devices the default is 00h, indicating “Host Bridge”.
7:0
RO
0
Register-Level Programming Interface.
This field identifies a specific programming interface (if any), that device
This field identifies a specific programming interface (if any), that device
independent software can use to interact with the device. There are no such
interfaces defined for “Host Bridge” types, and this field is hardwired to 00h.