IBM Intel Xeon E5504 46D1351 User Manual
Product codes
46D1351
Intel® Xeon® Processor 5500 Series Datasheet, Volume 2
85
Register Description
2.14
Integrated Memory Controller Test Registers
2.14.1
MC_TEST_ERR_RCV1
Memory test error recovery and detection. This is another address to access
COR_ECC_CNT register. This is the ecc error information for DIMM 2.
COR_ECC_CNT register. This is the ecc error information for DIMM 2.
2.14.2
MC_TEST_ERR_RCV0
Memory test error recovery and detection. This is another address to access
COR_ECC_CNT register. This is the ecc error information for DIMM 0 and DIMM 1.
COR_ECC_CNT register. This is the ecc error information for DIMM 0 and DIMM 1.
Device:
3
Function: 2
Offset:
80h, 84h, 88h, 8Ch, 90h, 94h
Access as a Dword
Bit
Type
Reset
Value
Description
31
RW
0
DIMM1_ERR_OVERFLOW. Correctable error overflow on DIMM 1/Rsvd.
30:16
RW
0
DIMM1_COR_ERR. Correctable error count from DIMM 1/Rsvd.
15
RW
0
DIMM0_ERR_OVERFLOW. Correctable error overflow on DIMM 0/2.
14:0
RW
0
DIMM0_COR_ERR. Correctable error count from DIMM 0/2.
Device:
3
Function: 4
Offset:
60h
Access as a Dword
Bit
Type
Reset
Value
Description
15
RW
0
DIMM2_ERR_OVERFLOW. Correctable error overflow on DIMM 2.
14:0
RW
0
DIMM2_COR_ERR. Correctable error count from DIMM 2.
Device:
3
Function: 4
Offset:
64h
Access as a Dword
Bit
Type
Reset
Value
Description
31
RW
0
DIMM1_ERR_OVERFLOW. Correctable error overflow on DIMM 1.
30:16
RW
0
DIMM1_COR_ERR. Correctable error count from DIMM 1.
15
RW
0
DIMM0_ERR_OVERFLOW. Correctable error overflow on DIMM 0.
14:0
RW
0
DIMM0_COR_ERR. Correctable error count from DIMM 0.