Planar lc640.480.33-ac Operating Guide

Method A represents sourcing the dimming input from a voltage source such as a DAC or
analog op amp. The device should be powered from +5 Vdc such that the device’s output
will not exceed the allowable input range of the dimming input.

Method B creates the dimming voltage from a potentiometer. The recommended value
for the pot is from 10K to 100K ohms. If J2 pin 1 is used as the pot high-side voltage
reference as shown, then a lower pot value may restrict the maximum luminance
attainable from the backlight as the drop due to the series limiting resistor becomes
significant. Pot values greater than 100K ohm will result in response non-linearity due to
loading from the dimming input. Some gain is provided in the dimming input path of the
backlight to compensate for interface losses whereby the input dimming range provided
by the source does not quite reach the 0 or +5 Vdc rails.

Method C shows a simple strap which sets the display to maximum luminance.  If the
input is left unconnected, the input will be in the mid-level (half luminance) condition.

Method D represents a CMOS or TTL logic gate, or a comparator to drive the backlight
/DISABL input.

Method E shows an open collector device such as a bipolar transistor or FET.

Method F represents a switch or jumper.

In all cases, the return is to J2 pin 3. By its nature, the automatic brightness control
disable input (/ABCOFF) would be most likely be either permanently open or
permanently strapped to ground.

If the display needs to be physically inverted due to mechanical packaging or optical
(e.g. vertical viewing angle) considerations, the display image can be rotated 180
degrees. This is described in Table 17.

Default orientation

1

0

J3 at left, ambient light sensor at top.

Reverse orientation

0

1

J3 at right, ambient light sensor at bottom.