Intel Core™ i7-860 Processor (8M Cache, 2.80 GHz) BX8060517860 User Manual

Product codes
BX8060517860
Page of 98
Register Description
42
Datasheet
25:24
RW
0
PAM3_LOENABLE. 0D0000h-0D3FFFh Attribute (LOENABLE). 
This field controls the steering of read and write cycles that address the BIOS 
area from 0D0000h to 0D3FFFh.
00 = DRAM Disabled: All accesses are directed to ESI. 
01 = Read Only: All reads are sent to DRAM. All writes are forwarded to ESI. 
10 = Write Only: All writes are send to DRAM. Reads are serviced by ESI. 
11 = Normal DRAM Operation: All reads and writes are serviced by DRAM. 
21:20
RW
0
PAM2_HIENABLE. 0CC000h-0CFFFFh Attribute (HIENABLE). 
This field controls the steering of read and write cycles that address the BIOS 
area from 0CC000h to 0CFFFFh. 
00 = DRAM Disabled: All accesses are directed to ESI. 
01 = Read Only: All reads are sent to DRAM. All writes are forwarded to ESI. 
10 = Write Only: All writes are send to DRAM. Reads are serviced by ESI. 
11 = Normal DRAM Operation: All reads and writes are serviced by DRAM. 
17:16
RW
0
PAM2_LOENABLE. 0C8000h-0CBFFFh Attribute (LOENABLE). 
This field controls the steering of read and write cycles that address the BIOS 
area from 0C8000h to 0CBFFFh. 
00 = DRAM Disabled: All accesses are directed to ESI. 
01 = Read Only: All reads are sent to DRAM. All writes are forwarded to ESI. 
10 = Write Only: All writes are send to DRAM. Reads are serviced by ESI. 
11 = Normal DRAM Operation: All reads and writes are serviced by DRAM. 
13:12
RW
0
PAM1_HIENABLE. 0C4000h-0C7FFFh Attribute (HIENABLE). 
This field controls the steering of read and write cycles that address the BIOS 
area from 0C4000h to 0C7FFFh. 
00 = DRAM Disabled: All accesses are directed to ESI. 
01 = Read Only: All reads are sent to DRAM. All writes are forwarded to ESI. 
10 = Write Only: All writes are send to DRAM. Reads are serviced by ESI. 
11 = Normal DRAM Operation: All reads and writes are serviced by DRAM. 
9:8
RW
0
PAM1_LOENABLE. 0C0000h-0C3FFFh Attribute (LOENABLE). 
This field controls the steering of read and write cycles that address the BIOS 
area from 0C0000h to 0C3FFFh. 
00 = DRAM Disabled: All accesses are directed to ESI. 
01 = Read Only: All reads are sent to DRAM. All writes are forwarded to ESI. 
10 = Write Only: All writes are send to DRAM. Reads are serviced by ESI. 
11 = Normal DRAM Operation: All reads and writes are serviced by DRAM. 
5:4
RW
0
PAM0_HIENABLE. 0F0000h-0FFFFFh Attribute (HIENABLE). 
This field controls the steering of read and write cycles that address the BIOS 
area from 0F0000h to 0FFFFFh. 
00 = DRAM Disabled: All accesses are directed to ESI. 
01 = Read Only: All reads are sent to DRAM. All writes are forwarded to ESI. 
10 = Write Only: All writes are send to DRAM. Reads are serviced by ESI. 
11 = Normal DRAM Operation: All reads and writes are serviced by DRAM. 
Device:
0
Function: 1
Offset:
40h
Access as a Dword
Bit
Type
Reset
Value
Description