Intel Core™ i7-860 Processor (8M Cache, 2.80 GHz) BX8060517860 User Manual

56

Datasheet

This register pair contains part of the address of the last patrol scrub request issued. 
When running memtest, the failing address is logged in this register on memtest 
errors. Software can write the next address into this register. Scrubbing must be 
disabled to reliably read and write this register.

9:8

RW

0

CHNL. 
This field can be written to specify the next scrub address with STARTSCRUB in 

the MC_SCRUB_CONTROL register. This register is not updated with channel 

address of the last scrub address issued.

7:6

RW

0

DIMM. 
This field contains the DIMM of the last scrub issued. Can be written to specify 

the next scrub address with STARTSCRUB in the MC_SCRUB_CONTROL register. 

For writes, to the register this field always contains the Rank ID. For reads, the 

following translation must be done: 
If 3 DIMMs are on the channel, then the rank is RANK[0] while the dimm is the 

concatenation of DIMM[0] and RANK[1].

5:4

RW

0

RANK. 
This field contains the rank of the last scrub issued. Can be written to specify 

the next scrub address with STARTSCRUB in the MC_SCRUB_CONTROL 

register.. For writes, to the register this field always contains the rank id. For 

reads, the following translation must be done: 
If 3 dimms are on the channel then the rank is RANK[0] while the dimm is the 

concatenation of DIMM[0] and RANK[1].

3:0

RW

0

BANK. 
This field contains the bank of the last scrub issued. Can be written to specify 

the next scrub address with STARTSCRUB in the MC_SCRUB_CONTROL 

register..