Intermec 6100 Reference Guide
APPENDIX B
Common PEN*KEY 6000 Series Information
B-10 PEN*KEY
R
6100 Computer Programmer’s Reference Guide
;
pusha
push ax
push bx
push cx
push dx
push si
push di
mov
push ax
push bx
push cx
push dx
push si
push di
mov
dx,dataseg
mov
ds,dx
mov
dx,[bp]
push dx
push si
push ax
push di
call baderr_
add
push si
push ax
push di
call baderr_
add
sp,8
mov
–6[bp],al
;set return code
;
popa
pop
pop
di
pop
si
pop
dx
pop
cx
pop
bx
pop
ax
pop
es
pop
ds
mov
sp,bp
pop
bp
iret
#endasm
}
}
IDLE.CPP
//
// CPU Idle call sample source code
//
#include <dos.h>
// CPU Idle call sample source code
//
#include <dos.h>
// int86
#include <stdio.h> // printf, etc
//
// CPU Idle calls cause the processor to halt (via HLT instruction) until the
// next hardware interrupt. This causes good power savings if used during
// input polling loops, or other low activity points in an application. See
// MS-Intel APM 1.1 specification or Ralf Brown’s interrupt list, for info.
//
unsigned char APMCPUIdle(void) {
union REGS regs;
regs.x.ax= 0x5305;
int86(0x15, ®s, ®s); // makes actual function call being tested
if (regs.x.cflag==0) {
//
// CPU Idle calls cause the processor to halt (via HLT instruction) until the
// next hardware interrupt. This causes good power savings if used during
// input polling loops, or other low activity points in an application. See
// MS-Intel APM 1.1 specification or Ralf Brown’s interrupt list, for info.
//
unsigned char APMCPUIdle(void) {
union REGS regs;
regs.x.ax= 0x5305;
int86(0x15, ®s, ®s); // makes actual function call being tested
if (regs.x.cflag==0) {
// CPU Idle successful
return (0);
}
return (0);
}
else {
// An error occurred, check error code.
switch (regs.h.ah) {
switch (regs.h.ah) {
case (0x03);
// Interface not connected
break;
break;
case (0x0B);
// Interface not engaged
default:
// Unrecognized Return code
break;
break;
}
return ((unsigned carh)regs.h.ah);
// return the error code
B. Common PEN*KEY
6000 Series Info.