Intel Pentium III BX80526C800256E User Manual
Product codes
BX80526C800256E
Datasheet
93
Pentium
®
III Processor for the PGA370 Socket at 500 MHz to 1.13 GHz
NOTE:
1. Synchronous assertion with active TDRY# ensures synchronization.
DEFER#
Low
BCLK
AGTL+ Input
Always
FLUSH#
Low
Asynch
CMOS Input
Always
1
IGNNE#
Low
Asynch
CMOS Input
Always
1
INIT#
Low
Asynch
CMOS Input
Always
1
INTR
High
Asynch
CMOS Input
APIC disabled mode
LINT[1:0]
High
Asynch
CMOS Input
APIC enabled mode
NMI
High
Asynch
CMOS Input
APIC disabled mode
PICCLK
High
—
APIC Clock
Always
PREQ#
Low
Asynch
CMOS Input
Always
PWRGOOD
High
Asynch
CMOS Input
Always
RESET#
Low
BCLK
AGTL+ Input
Always
RS[2:0]#
Low
BCLK
AGTL+ Input
Always
RSP#
Low
BCLK
AGTL+ Input
Always
RTTCTRL
N/A
Asynch
Power/Other
SLEWCTRL
N/A
Asynch
Power/Other
SLP#
Low
Asynch
CMOS Input
During Stop-Grant state
SMI#
Low
Asynch
CMOS Input
STPCLK#
Low
Asynch
CMOS Input
TRDY#
Low
BCLK
AGTL+ Input
Table 44. Input Signals (Sheet 2 of 2)
Name
Active Level
Clock
Signal Group
Qualified