Intel Xeon X3460 BX80605X3460 User Manual
Product codes
BX80605X3460
Processor Integrated I/O (IIO) Configuration Registers
174
Intel® Xeon® Processor 3400 Series Datasheet, Volume 2
3.7.1.4
QPI[0]LCL—Intel
®
QuickPath Interconnect Link Control
Register per Intel QuickPath Interconnect port. This register is used for Control of Link
Layer.
Layer.
3.7.1.5
QPI[0]LCRDC—Intel
®
QuickPath Interconnect Link Credit Control
Registers controls what credits are defined for each message class on VN0 and VNA.
These credits are made visible on Intel QuickPath Interconnect during the initialization
phase of the link layer. Incorrect programming can result in overflow of the receive
queue. When returning credits on Intel QuickPath Interconnect this register is used in
conjunction with the Intel QuickPath Interconnect standard register QPI[0]LCL—Intel
QuickPath Interconnect Link Control to determine how many credits are returned.
These credits are made visible on Intel QuickPath Interconnect during the initialization
phase of the link layer. Incorrect programming can result in overflow of the receive
queue. When returning credits on Intel QuickPath Interconnect this register is used in
conjunction with the Intel QuickPath Interconnect standard register QPI[0]LCL—Intel
QuickPath Interconnect Link Control to determine how many credits are returned.
This value is captured and used by the Link Layer when exiting the parameter
exchange. This state is referred to as “Begin Normal Operation.”
exchange. This state is referred to as “Begin Normal Operation.”
Register:
QPI[0]LCL
Device: 16
Function: 0
Offset:
C4h
Bit
Attr
Default
Description
31:21
RO
0
Reserved
20
RWDS
0
L1 enable
Bit is ANDed with the parameter exchanged value for L1 to determine if the
Bit is ANDed with the parameter exchanged value for L1 to determine if the
link may enter L1.
0 = Disable
1 = Enable
0 = Disable
1 = Enable
19:0
RO
0
Reserved
Register: QPI[0]LCRDC
Device:
16
Function: 0
Offset: F8h
Bit
Attr
Default
Description
31
RV
0
Reserved
30:28
RV
0h
Reserved
27
RV
0
Reserved
26:24
RWDS
1/2h
VN0 - NCB credits
Allowed values = 0-7 credits
Allowed values = 0-7 credits
23
RV
0
Reserved
22:20
RWDS
1/2h
VN0 - NCS credits
Allowed values = 0-7 credits
Allowed values = 0-7 credits
19
RV
0
Reserved
18:16
RWDS
1/2h
VN0 - NDR credits
With Isoc enabled this value is expected to be set at 3 to ensure QoS with
With Isoc enabled this value is expected to be set at 3 to ensure QoS with
processor.
Allowed values = 0-7 credits
Allowed values = 0-7 credits
15
RV
0
Reserved