Intel Xeon X3460 BX80605X3460 User Manual
Product codes
BX80605X3460
Intel® Xeon® Processor 3400 Series Datasheet, Volume 2
289
System Address Map
5.8.1.4
Summary of Outbound Target Decoder Entries
provides a list of all the target decoder entries in IIO, such as PCIe port,
required by the outbound target decoder to positively decode towards a target
.
Notes:
1.
This is listed as 4+1 entries because each of the 4 local peer-to-peer bridges have their own VGA decode
enable bit and local IIO has to comprehend this bit individually for each port, and local IIO’s
QPIPVGASAD.Valid bit is used to indicate the dual IIO has VGA port or not.
5.8.1.5
Summary of Outbound Memory/IO/Configuration Decoding
Throughout the tables in this section, a reference to a PCIe port generically refers to a
standard PCIe port or a DMI port.
standard PCIe port or a DMI port.
Note:
Integrated I/O Module will support configurations cycles that originate only from the
processor. It may support inbound CFG for debug only.
Table 5-4.
Outbound Target Decoder Entries
Address Region
Target
Decoder Entry
Comments
VGA (Memory space A_0000h–
B_FFFFh and I/O space 3B0h–
3BBh and 3C0h–3DFh)
4+1
1
Fixed.
TPM/TXT/FW ranges (E/F segs
and 4 G–16 M to 4 G)
1
Fixed.
MMIOL
4
Variable. From peer-to-peer Bridge Configuration
Register Space
MMIOH
4
Variable. From peer-to-peer Bridge Configuration
Register Space (upper 32 bits PM BASE/LIMIT)
CFGBUS
1
Legacy IIO internal bus number should be set to bus 0.
4
Variable. From peer-to-peer Bridge Configuration
Register Space for PCIe bus number decode.
VTBAR
1
Variable. Decodes the Intel VT-d chipset registers.
IO
4
Variable. From four local peer-to-peer Bridge
Configuration Register Space of the PCIe port.
Table 5-5.
Decoding of Outbound Memory Requests from Intel
®
QuickPath Interconnect
(from processor or remote Peer-to-Peer)
Address Range
Conditions
IIO Behavior
CB DMA BAR,
I/OxAPIC BAR,
ABAR, VTBAR
CB_BAR, ABAR, MBAR, VTBAR and remote
peer-to-peer access
Completer Abort
CB_BAR, ABAR, MBAR, VTBAR and not
remote peer-to-peer access
Forward to that target
TPM, FED4_0xxx -
FED4_7xxx
Processor has no Intel TPM.
Forward to DMI as TXT_* cycle assuming
Intel TPM is not supported.
All other memory
accesses
! (CB_BAR, ABAR, MBAR, VTBAR, TPM)
and one of the downstream ports
positively claimed the address
Forward to that port
! (CB_BAR, ABAR, MBAR, VTBAR, TPM)
and none of the downstream ports
positively claimed the address and DMI is
the subtractive decode port
Forward to DMI
! (CB_BAR, ABAR, MBAR, VTBAR, TPM)
and none of the downstream ports
positively claimed the address and DMI is
not the subtractive decode port
Master Abort