Intel Xeon X3460 BX80605X3460 User Manual

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Intel® Xeon® Processor 3400 Series Datasheet, Volume 2

This register allows control of DMI.

This register indicates DMI status.

15:8

RO

0h

7

RW

0

Extended Synch (EXTSYNC)
0 = Standard Fast Training Sequence (FTS).

1 = Forces the transmission of additional ordered sets when exiting the L0s 

state and when in the Recovery state.

This mode provides external devices (for example, logic analyzers) monitoring 

the Link time to achieve bit and symbol lock before the link enters L0 and 

resumes communication.
This is a test mode only and may cause other undesired side effects such as 

buffer overflows or underruns.

6:2

RO

0h

1:0

RW

00b

Active State Power Management Support (ASPMS)
Controls the level of active state power management supported on the given 

link.
00 = Disabled
01 = L0s Entry Supported
10 = Reserved
11 = L0s and L1 Entry Supported

15:10

RO

0h

9:4

RO

00h

Negotiated Width (NWID) 
Indicates negotiated link width. This field is valid only when the link is in the 

L0, L0s, or L1 states (after link width negotiation is successfully completed).
00h = Reserved
01h = X1
02h = X2
04h = X4
All other encodings are reserved.

3:0

RO

1h

Negotiated Speed (NSPD) 
Indicates negotiated link speed.
1h = 2.5 Gb/s
All other encodings are reserved.