Intel S5000XAL BB5000XALR User Manual

Product codes
BB5000XALR
Page of 112
Intel
®
 Server Board S5000PAL / S5000XAL TPS 
Functional Architecture 
Revision 1.9 
 
 
Intel order number: D31979-010 
31
3.1.3.4.2 
DIMM Sparing Mode Memory Configuration 
The MCH provides DIMM sparing capabilities. Sparing is a RAS feature that involves configuring a DIMM 
to be placed in reserve so it can be use to replace a DIMM that fails. DIMM sparing occurs within a given 
bank of memory and is not supported across branches.  
There are two supported Memory Sparing configurations.  
3.1.3.4.2.1 Single 
Branch Mode Sparing  
 
Channel  A 
Channel B 
Channel C  
Channel  D 
Branch 0
Branch 1
Intel® 5000P/5000X Memory Controller Hub
Slot 1 
Slot 2 
DIMM_C2 
DIMM_C1 
DIMM_D2 
DIMM_D1 
DIMM_A1 
DIMM_A2 
DIMM_B1 
DIMM_B2 
 
Figure 14. Single Branch Mode Sparing DIMM Configuration 
•  DIMM_A1 and DIMM_B1 must be identical in organization, size and speed. 
•  DIMM_A2 and DIMM_B2 must be identical in organization, size and speed. 
•  DIMM_A1 and DIMM_A2 need not be identical in organization, size and speed. 
•  DIMM_B1 and DIMM_B2 need not be identical in organization, size and speed. 
•  Sparing should be enabled in BIOS setup. 
• BIOS 
will 
configure 
Rank Sparing Mode. 
•  The larger of the pairs {DIMM_A1, DIMM_B1} and {DIMM_A2, DIMM_B2} will be selected as the 
spare pair unit.