Elixir M2U25664DS88B3G-5T User Manual

  

Preliminary

 

Based on DDR400/333/266 256M bit B Die device

 
 

• 184 Dual In-Line Memory Module (DIMM) 
• Unbuffered DDR DIMM based on 256M bit die B device, 
organized as either 32Mbx8 or 16Mbx16  
• Performance:

 

 PC3200 

PC2700 

PC2100

Speed Sort 

5T 

6K 

75B 

DIMM CAS Latency 

3 

2.5 

2.5 

Unit

f

CK

 Clock 

Frequency 

200 

166 

133  MHz

t

CK

 Clock 

Cycle 

5 

6 

7.5 

ns

f

DQ

  DQ Burst Frequency 

400 

333 

266 

MHz

• Intended for 133, 166 and 200  MHz applications

 

• Inputs and outputs are SSTL-2 compatible 
• V

DD

 = V

DDQ

 = 2.5V ±

 0.2V  (2.6V ± 0.1V for PC3200) 

• SDRAMs have 4 internal banks for concurrent operation 
• Differential clock inputs 
• Data is read or written on both clock edges 

• DRAM DLL aligns DQ and DQS transitions with clock transitions 
• Address and control signals are fully synchronous to positive 

clock edge 

• Programmable Operation: 

- DIMM CAS Latency: 2, 2.5, 3 
- Burst Type: Sequential or Interleave 
- Burst Length: 2, 4, 8 
- Operation: Burst Read and Write  

• Auto Refresh (CBR) and Self Refresh Modes 
• Automatic and controlled precharge commands 
• 7.8 

µs Max. Average Periodic Refresh Interval 

• Serial Presence Detect EEPROM 
• Gold contacts  
• SDRAMs are packaged in TSOP packages 

 
 

M2U51264DS8HB3G, M2U25664DS88B3G, and M2U12864DSH4B3G are unbuffered 184-Pin Double Data Rate (DDR) Synchronous 

DRAM Dual In-Line Memory Modules (DIMM). M2U51264DS8HB3G is 512MB modules organized as dual ranks using sixteen 32Mx8 

TSOP devices.  M2U25664DS88B3G is 256MB modules organized as single rank using eight 32Mx8 TSOP devices. M2U12864DSH4B3G 

is 128MB modules, organized as single rank using four 16Mx16 TSOP devices. 

 

Depending on the speed grade, these DIMMs are intended for use in applications operating up to 200 MHz clock speeds and achieves 

high-speed data transfer rates of up to 400 MHz. Prior to any access operation, the device CAS latency and burst type/ length/operation 

type must be programmed into the DIMM by address inputs and I/O inputs BA0 and BA1 using the mode register set cycle. 

The DIMM uses a serial EEPROM and through the use of a standard IIC protocol the serial presence-detect implementation (SPD) can be 

accessed. The first 128 bytes of the SPD data are programmed with the module characteristics as defined by JEDEC.