Intel P6200 CP80617004122AW Data Sheet

Product codes
CP80617004122AW
Page of 104
Introduction
10
Datasheet
1.1.1
Processor Terminology
Commonly used terms are explained here for clarification:
• Intel
®
 Pentium
®
 Dual-Core Desktop processor E2000 series — Dual core 
processor in the FC-LGA6 package with a 1 MB L2 cache.
• Processor — For this document, the term processor is the generic form of the 
Intel
®
 Pentium
®
 Dual-Core Desktop processor E2000 series. The processor is a 
single package that contains one or more execution units.
• Keep-out zone — The area on or near the processor that system design can not 
use. 
• Processor core — Processor core die with integrated L2 cache. 
• LGA775 socket — The processors mate with the system board through a surface 
mount, 775-land, LGA socket.
• Integrated heat spreader (IHS) —A component of the processor package used 
to enhance the thermal performance of the package. Component thermal solutions 
interface with the processor at the IHS surface.
• Retention mechanism (RM) — Since the LGA775 socket does not include any 
mechanical features for heatsink attach, a retention mechanism is required. 
Component thermal solutions should attach to the processor via a retention 
mechanism that is independent of the socket.
• FSB (Front Side Bus) — The electrical interface that connects the processor to 
the chipset. Also referred to as the processor system bus or the system bus. All 
memory and I/O transactions as well as interrupt messages pass between the 
processor and chipset over the FSB.
• Storage conditions — Refers to a non-operational state. The processor may be 
installed in a platform, in a tray, or loose. Processors may be sealed in packaging or 
exposed to free air. Under these conditions, processor lands should not be 
connected to any supply voltages, have any I/Os biased, or receive any clocks. 
Upon exposure to “free air”(i.e., unsealed packaging or a device removed from 
packaging material) the processor must be handled in accordance with moisture 
sensitivity labeling (MSL) as indicated on the packaging material.
• Functional operation — Refers to normal operating conditions in which all 
processor specifications, including DC, AC, system bus, signal quality, mechanical 
and thermal are satisfied. 
• Execute Disable Bit — The Execute Disable bit allows memory to be marked as 
executable or non-executable, when combined with a supporting operating system. 
If code attempts to run in non-executable memory the processor raises an error to 
the operating system. This feature can prevent some classes of viruses or worms 
that exploit buffer over run vulnerabilities and can thus help improve the overall 
security of the system. See the Intel
®
 Architecture Software Developer's Manual 
for more detailed information.
• Intel
®
 64 Architecture — An enhancement to Intel's IA-32 architecture, allowing 
the processor to execute operating systems and applications written to take 
advantage of the Intel 64 architecture. Further details on Intel 64 architecture and 
programming model can be found in the Intel Extended Memory 64 Technology 
Software Developer Guide at http://developer.intel.com/technology/
64bitextensions/.
• Enhanced Intel SpeedStep
®
 Technology — Enhanced Intel SpeedStep 
technology allows trade-offs to be made between performance and power 
consumptions, based on processor utilization. This may lower average power 
consumption (in conjunction with OS support).