QLogic 7104-1M-CABLE User Manual
7–Installation Verification and Additional Settings
Adapter and Other Settings
Adapter and Other Settings
7-2
IB0056101-00 H
S
Adapter and Other Settings
The following settings can be adjusted for better performance.
Use taskset to tune CPU affinity on Opteron systems with the
QLE7240, QLE7280, and QLE7140. Latency will be slightly lower for the
Opteron socket that is closest to the PCI Express bridge. On some chipsets,
bandwidth may be higher on this socket. See the QLogic Host Channel
Adapter and QLogic OFED Software Users Guide for more information on
using taskset. Also see the taskset(1) man page.
Opteron socket that is closest to the PCI Express bridge. On some chipsets,
bandwidth may be higher on this socket. See the QLogic Host Channel
Adapter and QLogic OFED Software Users Guide for more information on
using taskset. Also see the taskset(1) man page.
On the switch, use an IB MTU of 4096 bytes instead of 2048 bytes, if
available, with the QLE7240, QLE7280, and QLE7140. 4K MTU is
enabled in the InfiniPath driver by default. To change this setting for the
driver, see
available, with the QLE7240, QLE7280, and QLE7140. 4K MTU is
enabled in the InfiniPath driver by default. To change this setting for the
driver, see
.
Use a PCIe Max Read Request size of at least 512 bytes with the
QLE7240 and QLE7280. QLE7240 and QLE7280 adapters can support
sizes from 128 bytes to 4096 bytes in powers of two. This value is typically
set in the BIOS.
QLE7240 and QLE7280. QLE7240 and QLE7280 adapters can support
sizes from 128 bytes to 4096 bytes in powers of two. This value is typically
set in the BIOS.
Use a PCIe MaxPayload size of 256, where available, with the QLE7240
and QLE7280. The QLE7240 and QLE7280 adapters can support 128, 256,
or 512 bytes. This value is typically set by the BIOS as the minimum value
supported both by the PCIe card and the PCIe root complex.
and QLE7280. The QLE7240 and QLE7280 adapters can support 128, 256,
or 512 bytes. This value is typically set by the BIOS as the minimum value
supported both by the PCIe card and the PCIe root complex.
Make sure that write combining is enabled. The x86 Page Attribute Table
(PAT) mechanism that allocates Write Combining (WC) mappings for the
PIO buffers has been added and is now the default. If PAT is unavailable or
(PAT) mechanism that allocates Write Combining (WC) mappings for the
PIO buffers has been added and is now the default. If PAT is unavailable or
Green ON
Amber ON
Amber ON
The link is configured, properly connected, and ready.
Signal detected. Ready to talk to an SM to bring the link
fully up.
The link is configured. Properly connected and ready to
receive data and link packets.
Signal detected. Ready to talk to an SM to bring the link
fully up.
The link is configured. Properly connected and ready to
receive data and link packets.
Green BLINKING (quickly)
Amber ON
Amber ON
Indicates traffic
Green BLINKING
a
Amber BLINKING
Locates the adapter
This feature is controlled by ipath_control -b [On
| Off]
This feature is controlled by ipath_control -b [On
| Off]
Table Notes
a
This feature is available only on the QLE7240 and QLE7280 adapters
Table 7-1. LED Link and Data Indicators (Continued)
LED States
Indication